| Lifeng Nai |
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Personal webpage
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Research interest
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Multicore Computer Architecture
Parallel Programming Model
Transactional Memory
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All Refereed Papers
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| IPDPS | Jen-Cheng Huang, Lifeng Nai, Hyesoon Kim, and Hsien-Hsin S. Lee. "TBPoint: Reducing Simulation Time for Large-Scale GPGPU Kernels." In the 28th International Symposium on Parallel & Distributed Processing Symposium, Phoenix, AZ, 2014.
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| CF-14 | Lifeng Nai, Yinglong Xia, Ching-Yung Lin, Bo Hong, and Hsien-Hsin S. Lee. "Cache-Conscious Graph Collaborative Filtering on Multi-socket Multicore Systems." In Proceedings of the ACM International Conference on Computing Frontiers, Cagliari, Italy, May, 2014.
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| IPDPSW | Lifeng Nai and Hsien-Hsin S. Lee. "Reducing False Transactional Conflicts With Speculative Sub-blocking State - An Empirical Study for ASF Transactional Memory System." In the 27th International Symposium on Parallel & Distributed Processing Workshops and PhD Forum, Boston, MA, May, 2013.
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