| MMCS08 | Hrishikesh Amur, Ripal Nathuji, Mrinmoy Ghosh, Karsten Schwan, and Hsien-Hsin S. Lee. "IdlePower: Application-Aware Management of Processor Idle States." In Workshop on Managed Many-Core Systems co-located with ACM/IEEE International Symposium on High Performance Distributed Computing, Boston, MA, June, 2008.
[pdf] |
| PESPMA08 | Richard M. Yoo and Hsien-Hsin S. Lee. "Helper Transactions: Enabling Thread-Level Speculation via A Transactional Memory System." In Workshop on Parallel Execution of Sequential Programs on Multi-core Architectures in conjuction with ACM/IEEE International Symposium on Computer Architecture (ISCA-35), Beijing, China, June, 2008.
[pdf] [slides] |
| WACI-VI | Eric Fontaine and Hsien-Hsin S. Lee. "Bicephaly: Maximizing Bandwidth by Duplexing Power and Data." In Workshop on Wild and Crazy Ideas in conjunction with International Conference on Architectural Support for Programming Languages and Operating Systems, Seattle, WA, February, 2008.
[pdf] |
| HPEC-07 | Dong Hyuk Woo, Joshua B. Fryman, Allan D. Knies, Marsha Eng, and Hsien-Hsin S. Lee. "POD: A Parallel-On-Die Architecture." In the 11th Annual Workshop on High Performance Embedded Computing, Lexington, Massachusetts, September, 2007. (One of four finalists for the Best Paper Award.)
[pdf] [slides] |
| FPGA07 | Taeweon Suh, Hsien-Hsin S. Lee, Shih-Lien Lu, and John Shen. "Coherence Traffic Considered Harmful - An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems." In the 15th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Monterey, CA, February, 2007. |
| CMPMSI | Dong Hyuk Woo and Hsien-Hsin S. Lee. "Analyzing Performance Vulnerability due to Resource Denial-of-Service Attack on Chip Multiprocessors." In Workshop on Chip Multiprocessor Memory Systems and Interconnects in conjunction with the 13th International Conference on High-Performance Computer Architecture, Phoenix, Arizona, February, 2007.
[pdf] [slides] |
| SIGDA Ph.D. forum | Taeweon Suh and Hsien-Hsin S. Lee. "Integration of Cache Coherence Protocols for MPSoCs and Coherence Traffic Evaluation using FPGA." In the 9th SIGDA Ph.D. forum in conjunction with the 43rd Design Automation Conference, San Francisco, CA, July, 2006. |
| WARFP | Christopher R. Clark, Ripal Nathuji, and Hsien-Hsin S. Lee. "Using an FPGA as a Prototyping Platform for Multi-core Processor Applications." In Workshop on Architectural Research using FPGA Platforms in conjunction with International Symposium on High-Performance Computer Architecture, San Francisco, CA, February, 2005.
[pdf] |
|
