Georgia Tech > CoE > ECE > MARS [ MARS | People | Research | Publications | Software | Internal ]
All Papers Journal Articles Conference Papers Workshop and Poster Book Chapters Theses

All Technical Papers (by date)
Systems for Machine Learning
Sustainability
Conventional Processor Architecture and Compilers, Performance Modeling
Secure, Dependable and Autonomic Computing, DRM
Embedded Computing
Low-Power Techniques
FPGA Techniques
3D ICs, SoC, Physical Design and EDA Tools
Multicore, Parallel Architecture and Systems
Support for 3D Graphics



Refereed Workshop Papers / Poster Presentations

2022

NeurIPS-TSRMLHanieh Hashemi, Wenjie Xiong, Liu Ke, Kiwan Maeng, Murali Annavaram, G. Edward Suh, and Hsien-Hsin S. Lee. "Private Data Leakage via Exploiting Access Patterns of Sparse Features in Deep Learning-based Recommendation Systems." In the 2022 Trust and Socially Responsible Machine Learning co-located with NeurIPS, New Orleans, 2022.
[pdf]

2013

IPDPSWLifeng Nai and Hsien-Hsin S. Lee. "Reducing False Transactional Conflicts With Speculative Sub-blocking State - An Empirical Study for ASF Transactional Memory System." In the 27th International Symposium on Parallel & Distributed Processing Workshops and PhD Forum, Boston, MA, May, 2013.
[pdf]

2012

WDDDSungkap Yeo, Nak Hee Seong, and Hsien-Hsin S. Lee. "Can Multi-Level Cell PCM Be Reliable and Usable? Analyzing the Impact of Resistance Drift." In the 10th Annual Workshop on Duplicating, Deconstructing and Debunking in conjunction with the 39th International Symposium on Computer Architecture, Portland, OR, June, 2012.
[pdf]

2010

3D-TESTDean Lewis, Michael Healy, Mohammad Hossain, Tzu-Wei Lin, Mohit Pathak, Hemant Sane, Sung Kyu Lim, Gabriel Loh, and Hsien-Hsin S. Lee. "Design and test of 3D-MAPS, a 3D Die-Stack Many-Core Processor." In the first IEEE International Workshop on Testing Three-Dimensional Stacked Integrated Circuits (poster), Austin, Texas, November, 2010.
[pdf]

2009

3D IntegrationDean L. Lewis and Hsien-Hsin S. Lee. "Test Strategies for 3D Die Stacked Integrated Circuits." In Workshop on 3D Integration --- Technology, Architecture, Design, Automation, and Test in conjunction with Design, Automation and Test in Europe (DATE-09), Nice, France, April, 2009.
[pdf]
DPC Ahmad Sharif and Hsien-Hsin S. Lee. "Data Prefetching Mechanism by Exploiting Global and Local Access Patterns." In The Journal of Instruction-Level Parallelism Data Prefetching Championship (DPC-1), Raleigh, NC, February, 2009.
[slides]

2008

MMCS08Hrishikesh Amur, Ripal Nathuji, Mrinmoy Ghosh, Karsten Schwan, and Hsien-Hsin S. Lee. "IdlePower: Application-Aware Management of Processor Idle States." In Workshop on Managed Many-Core Systems co-located with ACM/IEEE International Symposium on High Performance Distributed Computing, Boston, MA, June, 2008.
[pdf]
PESPMA08Richard M. Yoo and Hsien-Hsin S. Lee. "Helper Transactions: Enabling Thread-Level Speculation via A Transactional Memory System." In Workshop on Parallel Execution of Sequential Programs on Multi-core Architectures in conjuction with ACM/IEEE International Symposium on Computer Architecture (ISCA-35), Beijing, China, June, 2008.
[pdf] [slides]
WACI-VIEric Fontaine and Hsien-Hsin S. Lee. "Bicephaly: Maximizing Bandwidth by Duplexing Power and Data." In Workshop on Wild and Crazy Ideas in conjunction with International Conference on Architectural Support for Programming Languages and Operating Systems, Seattle, WA, February, 2008.
[pdf]

2007

HPEC-07 Dong Hyuk Woo, Joshua B. Fryman, Allan D. Knies, Marsha Eng, and Hsien-Hsin S. Lee. "POD: A Parallel-On-Die Architecture." In the 11th Annual Workshop on High Performance Embedded Computing, Lexington, Massachusetts, September, 2007. (One of four finalists for the Best Paper Award.)
[pdf] [slides]
FPGA07Taeweon Suh, Hsien-Hsin S. Lee, Shih-Lien Lu, and John Shen. "Coherence Traffic Considered Harmful - An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems." In the 15th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Monterey, CA, February, 2007.
CMPMSI Dong Hyuk Woo and Hsien-Hsin S. Lee. "Analyzing Performance Vulnerability due to Resource Denial-of-Service Attack on Chip Multiprocessors." In Workshop on Chip Multiprocessor Memory Systems and Interconnects in conjunction with the 13th International Conference on High-Performance Computer Architecture, Phoenix, Arizona, February, 2007.
[pdf] [slides]
ESNS07 Hsien-Hsin S. Lee and Santosh Pande. "Secure Processing On-Chip." In Army Research Office Planning Workshop on Embedded Systems and Network Security, Raleigh, North Carolina, February, 2007.
[pdf] [slides]

2006

SIGDA Ph.D. forumTaeweon Suh and Hsien-Hsin S. Lee. "Integration of Cache Coherence Protocols for MPSoCs and Coherence Traffic Evaluation using FPGA." In the 9th SIGDA Ph.D. forum in conjunction with the 43rd Design Automation Conference, San Francisco, CA, July, 2006.
WARFPTaeweon Suh, Hsien-Hsin S. Lee, Shih-Lien Lu, and John Shen. "Initial Observations of Hardware/Software Co-Simulation using FPGA in Architecture Research." In Workshop on Architecture Research using FPGA Platforms in conjunction with International Symposium on High-Performance Computer Architecture, Austin, Texas, February, 2006.
[pdf] [slides]

2005

Perf. Monitor DesignMartin Schulz, Brian White, Sally A. McKee, and Hsien-Hsin Lee. "A Vision for Next Generation System Monitoring." In Workshop on Hardware Performance Monitor Design and Functionality in conjunction with International Symposium on High-Performance Computer Architecture, San Francisco, CA, February, 2005.
[slides]
WARFPTaeweon Suh, Hsien-Hsin S. Lee, Sally A. McKee, and Martin Schulz. "Evaluating System-wide Monitoring Capsule Design Using Xilinx Virtex-II Pro FPGA." In Workshop on Architecture Research using FPGA Platforms in conjunction with International Symposium on High-Performance Computer Architecture, San Francisco, CA, February, 2005.
[pdf] [slides]
WARFPChristopher R. Clark, Ripal Nathuji, and Hsien-Hsin S. Lee. "Using an FPGA as a Prototyping Platform for Multi-core Processor Applications." In Workshop on Architectural Research using FPGA Platforms in conjunction with International Symposium on High-Performance Computer Architecture, San Francisco, CA, February, 2005.
[pdf]

2004

WASSAWeidong Shi, Hsien-Hsin S. Lee, Chenghuai Lu, and Mrinmoy Ghosh. "Towards the Issues in Architectural Support for Protection of Software Execution." In the Workshop on Architectural Support for Security and Anti-Virus in conjunction with the 11th International Conference on Architectural Support for Programming Languages and Operating Systems, pp.1-10, Boston, MA, October, 2004.
[pdf] [slides]

2003

WCEDHsien-Hsin S. Lee, Joshua B. Fryman, A. Utku Diril, and Yuvraj S. Dhillon. "The Elusive Metric for Low-Power Architecture Research." In the Workshop on Complexity-Effective Design in conjunction with the 30th International Symposium on Computer Architecture, San Diego, California, June, 2003.
[pdf] [slides]
100 Binney Street
Cambridge, MA 02142

http://hsienhsinlee.github.io
650-709-9452