All Technical Papers (by date)
Systems for Machine Learning
Sustainability
Conventional Processor Architecture and Compilers, Performance Modeling
Secure, Dependable and Autonomic Computing, DRM
Embedded Computing
Low-Power Techniques
FPGA Techniques
3D ICs, SoC, Physical Design and EDA Tools
Multicore, Parallel Architecture and Systems
Support for 3D Graphics
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All Refereed Papers
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2024
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| NeurIPS'24 | Haiyang Huang, Newsha Ardalani, Anna Sun, Liu Ke, Shruti Bhosale, Hsien-Hsin S. Lee, Carole-Jean Wu, Benjamin C. Lee. "Toward Efficient Inference for Mixtures of Experts." In the 38th Annual Conference on Neural Information Processing System, Vancouver, Canada, December 2024. |
| IEEE MICRO | Hsien-Hsin S. Lee. "The Path to Powering Intelligence." In IEEE MICRO Special on The Past, Present, and Future of Warehouse-Scale Computing, Volume 44, Issue 5, Sept/Oct, 2024.
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| USENIX Security'24 | Trishita Tiwari, Suchin Gururangan, Chuan Guo, Weizhe Hua, Sanjay Kariyappa, Udit Gupta, Wenjie Xiong, Kiwan Maeng, Hsien-Hsin S. Lee, G. Edward Suh. "Information Flow Control in Machine Learning Through Modular Model Architecture." In the 33rd USENIX Security Symposium, Philadelphia, PA, August, 2024.
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| IEEE MICRO | Hsien-Hsin S. Lee. "Top Picks Ignite Innovation." In IEEE MICRO Special on Top Picks of Computer Archtiecture Conferences of 2023, Volume 44, Issue 4, July/August, 2024.
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| IEEE MICRO | Hsien-Hsin S. Lee. "An Incoming World of Decoupling Siliconomy." In IEEE MICRO Special on Hot Chips, Volume 44, Issue 3, May/June, 2024.
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| ASPLOS'24 | Maximilian Lam, Jeff Johnson, Wenjie Xiong, Kiwan Maeng, Udit Gupta, Yang Li, Liangzhen Lai, Ilias Leontiadis, Minsoo Rhu, Hsien-Hsin S. Lee, Vijay Janapa Reddi, Gu-Yeon Wei, David Brooks, G. Edward Suh. "GPU-based Private Information Retrieval for On-Device Machine Learning." In the ACM International Conference on Architectural Support for Programming Languages and Operating Systems, San Diego, California, April, 2024.
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| IEEE MICRO | Hsien-Hsin S. Lee. "Beyond Wires: The Future of Interconnects." In IEEE MICRO Special on Hot Interconnects, Volume 44, Issue 2, March/April, 2024.
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| IEEE MICRO | Hsien-Hsin S. Lee. "Computing with COOL Chips." In IEEE MICRO Special on COOL Chips, Volume 44, Issue 1, Jan/Feb, 2024.
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2023
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| IEEE MICRO | Vivek Parmer, Syed Shakib Sarwar, Ziyun Li, Hsien-Hsin S. Lee, Barbara De Salvo, Manan Suri. "Exploring Memory-Oriented Design Optimization of Edge-AI Hardware for Extended Reality Applications." In IEEE MICRO Special Issue on TinyML, Volume 43, Issue 6, 2023. |
| ICML-2023 | Sanjay Kariyappa, Chuan Guo, Kiwan Maeng, Wenjie Xiong, Edward Suh, Moinuddin K. Qureshi, and Hsien-Hsin S. Lee. "Cocktail Party Attack: Breaking Aggregation-based Privacy in Federated Learning Using Independent Component Analysis." In the 40th International Conference on Machine Learning, Honolulu, Hawaii, July, 2023.
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| IEEE MICRO | Udit Gupta, Mariam Elgamal, Gage Hills, Gu-Yeon Wei, Hsien-Hsin S. Lee, David Brooks, Carole-Jean Wu. "Architectural CO2 Footprint Tool: Designing Sustainable Computer Systems With an Architectural Carbon Modeling Tool." In IEEE MICRO special issue on Top Picks from the Computer Architecture Conferences of 2022, Volume 43, Issue 4, pp.107-117, 2023. |
| TinyML-23 | Vivek Parmer, Syed Shakib Sarwar, Ziyun Li, Hsien-Hsin S. Lee, Barbara De Salvo, Manan Suri. "Memory-Oriented Design Space Exploration of Edge-AI Hardware for XR Applications." In tinyML Research Symposium, 2023.
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| ICLR-2023 | Jiaxun Cui, Xiaomeng Yang, Mulong Luo, Geunbae Lee, Peter Stone, Hsien-Hsin S. Lee, Benjamin Lee, G. Edward Suh, Wenjie Xiong, Yuandong Tian. "MACTA: A Multi-agent Reinforcement Learning Approach for Cache Timing Attacks and Detection." In the 11th International Conference on Learning Representations, Kigali, Rwanda, May, 2023.
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| HPCA-29 | Mulong Luo, Wenjie Xiong, Geunbae Lee, Yueying Li, Xiaomeng Yang, Amy Zhang, Yuandong Tian, Hsien-Hsin S. Lee, G. Edward Suh. "AutoCAT: Reinforcement Learning for Automated Exploration of Cache Timing-Channel Attacks." In Proceedings of the 29th IEEE International Symposium on High-Performance Computer Architecture, Montreal, QC, Canada, Feb, 2023.
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2022
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| NeurIPS-TSRML | Hanieh Hashemi, Wenjie Xiong, Liu Ke, Kiwan Maeng, Murali Annavaram, G. Edward Suh, and Hsien-Hsin S. Lee. "Private Data Leakage via Exploiting Access Patterns of Sparse Features in Deep Learning-based Recommendation Systems." In the 2022 Trust and Socially Responsible Machine Learning co-located with NeurIPS, New Orleans, 2022.
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| MLSys-2022 | Carole-Jean Wu, Ramya Raghavendra, Udit Gupta, Bilge Acun, Newsha Ardalani, Kiwan Maeng, Gloria Chang, Fiona Aga Behram, James Huang, Charles Bai, Michael Gschwind, Anurag Gupta, Myle Ott, Anastasia Melnikov, Salvatore Candido, David Brooks, Geeta Chauhan, Benjamin Lee, Hsien-Hsin S. Lee, Bugra Akyildiz, Max Balandat, Joe Spisak, Ravi Jain, Mike Rabbat, Kim Hazelwood. "Sustainable AI: Environmental Implications, Challenges and Opportunities." In Proceedings of the 5th Conference on Machine Learning and Systems, Santa Clara, CA, August, 2022.
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| ISCA-49 | Udit Gupta, Mariam Elgamal, Gage Hills, Gu-Yeon Wei, Hsien-Hsin S. Lee, David Brooks, Carole-Jean Wu. "ACT: Designing Sustainable Computer Systems with an Architectural Carbon Modeling Tool." In Proceedings of the 49th ACM/IEEE International Symposium on Computer Architecture, New York City, New York, pp.784-799, June, 2022.
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| ISPASS-2022 | Yongqin Wang, Edward Suh, Wenjie Xiong, Benjamin Lefaudeux, Brian Knott, Murali Annavaram, Hsien-Hsin S. Lee. "Characterization of MPC-based Private Inferences for Transformer-based Models." In Proceedings of the 2022 ACM/IEEE International Symposium on Performance Analysis of Systems and Software, Singapore, pp.187-197, May, 2022.
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| IEEE MICRO | Udit Gupta, Young Geun Kim, Sylvia Lee, Jordan Tse, Hsien-Hsin S. Lee, Gu-Yeon Wei, David Brooks, Carole-Jean Wu. "Chasing Carbon: The Elusive Environmental Footprint of Computing." In IEEE MICRO special issue on Top Picks from the Computer Architecture Conferences of 2021, May/June, Vol.42, Issue 4, pp.37-47, 2022. |
| HPCA-28 | Wenjie Xiong, Liu Ke, Dimitrije Jankov, Michael Kounavis, Xiaochen Wang, Eric Northup, Jie Amy Yang, Bilge Acun, Carole-Jean Wu, Ping Tak Peter Tang, G. Edward Suh, Xuan Zhang, and Hsien-Hsin S. Lee.. "SecNDP: Secure Near-Data Processing with Untrusted Memory." In Proceedings of the 28th IEEE International Symposium on High Performance Computer Architecture, Seoul, South Korea, pp.244-258, April, 2022.
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| HPCA-28 | Liu Ke, Udit Gupta, Mark Hempstead, Carole-Jean Wu, Hsien-Hsin S. Lee, and Xuan Zhang. "Hercules: Heterogeneity-aware Inference Serving for At-scale Personalized Recommendation." In Proceedings of the 28th IEEE International Symposium on High Performance Computer Architecture, Seoul, South Korea, pp.141-154, April, 2022.
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| IEEE MICRO | Liu Ke, Xuan Zhang, Jinin So, Jong-Geon Lee, Shin-Haeng Kang, Sukhan Lee, Songyi Han, YeonGon Cho, JIN Hyun Kim, Yongsuk Kwon, KyungSoo Kim, Jin Jung, Ilkwon Yun, Sung Joo Park, Hyunsun Park, Joonho Song, Jeonghyeon Cho, Kyomin Sohn, Nam Sung Kim, and Hsien-Hsin S. Lee. "Near-Memory Processing in Action: Accelerating Personalized Recommendation with AxDIMM." In IEEE MICRO Special Issue on Processing in Memory, January/February, Vol.42, Issue 1, pp.116-127, 2022.
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2021
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| MICRO-54 | Udit Gupta, Samuel Hsia, Jeff Zhang, Mark Wilkening, Javin Pombra, Hsien-Hsin S. Lee, Gu-Yeon Wei, Carole-Jean Wu, and David Brooks. "RecPipe: Co-Designing Models and Hardware to Jointly Optimize Recommendation Quality and Performance." In Proceedings of the IEEE International Symposium on Microarchitecture, Athens, Greece, pp.870-884, October, 2021.
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| HPCA-27 | Udit Gupta, Young Geun Kim, Sylvia Lee, Jordan Tse, Hsien-Hsin S. Lee, Gu-Yeon Wei, David Brooks, Carole-Jean Wu. "Chasing Carbon: The Elusive Environmental Footprint of Computing." In Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, Seoul, South Korea, pp.854-867, February, 2021.
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| HPCA-27 | Brandon Reagen, Woo-Seok Choi, Yeongil Ko, Vincent T. Lee, Hsien-Hsin S. Lee, Gu-Yeon Wei, David Brooks. "Cheetah: Optimizing and Accelerating Homomorphic Encryption for Private Inference." In Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, Seoul, South Korea, pp.26-39, February, 2021.
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2020
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| ISCA-47 | Udit Gupta, Samuel Hsia, Vikram Saraph, Xiaodong Wang, Brandon Reagen, Gu-Yeon Wei, Hsien-Hsin S. Lee, David Brooks, and Carole-Jean Wu. "DeepRecSys: A System for Optimizing End-to-End At-Scale Neural Recommendation Inference." In Proceedings of the 47th ACM/IEEE International Symposium on Computer Architecture, Valencia, Spain, pp.982-995, June, 2020.
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| ISCA-47 | Liu Ke, Udit Gupta, Benjamin Y. Cho, David Brooks, Vikas Chandra, Utku Diril, Amin Firoozshahian, Kim Hazelwood, Bill Jia, Hsien-Hsin S. Lee, Meng Li, Bert Maher, Dheevatsa Mudigere, Maxim Naumov, Martin Schatz, Mikhail Smelyanskiy, Xiaodong Wang, Brandon Reagen, Carole-Jean Wu, Mark Hempstead, and Xuan Zhang. "RecNMP: Accelerating Personalized Recommendation with Near-Memory Processing." In Proceedings of the 47th ACM/IEEE International Symposium on Computer Architecture, Valencia, Spain, pp.790-803, June, 2020.
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| HPCA-26 | Udit Gupta, Carole-Jean Wu, Xiaodong Wang, Maxim Naumov, Brandon Reagen, David Brooks, Bradford Cottel, Kim Hazelwood, Mark Hempstead, Bill Jia, Hsien-Hsin S. Lee, Andrey Malevich, Dheevatsa Mudigere, Mikhail Smelyanskiy, Liang Xiong, Xuan Zhang. "The Architectural Implications of Facebook's DNN-based Personalized Recommendation." In Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, San Diego, CA, pp.488-501, February, 2020.
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2017
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| DATE-2017 | Tianjian Li, Yan Han, Xiaoyao Liang, Hsien-Hsin S. Lee, and Li Jiang. "Fault Clustering Technique for 3D Memory BISR." In Proceedings of the 2017 Design, Autoation and Test in Europe Conference and Exhibition (DATE), Lausanne, Switzerland, March, 2017.
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2015
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| IEEE TC | Dae Hyun Kim, Krit Athikulwongse, Michael B. Healy, Mohammad M. Hossain, Moongon Jung, Ilya Khorosh, Gokul Kumar, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Shreepad Panth, Mohit Pathak, Minzhen Ren, Guanhao Shen, Taigon Song, Dong Hyuk Woo, Xin Zhao, Joungho Kim, Ho Choi, Gabriel H. Loh, Hsien-Hsin S. Lee, and Sung Kyu Lim. "Design and Analysis of 3D-MAPS 3D Massively Parallel Processor with Stacked Memory." In IEEE Transactions on Computers, Vol. 64, No.1, pp.112-125, January, 2015.
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2014
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| MICRO-47 | Jen-Cheng Huang, Joo Hwan Lee, Hyesoon Kim, and Hsien-Hsin S. Lee. "GPUMech: GPU Performance Modeling Technique based on Interval Analysis." In Proceedings of the 47th ACM/IEEE International Symposium on Microarchitecture, pp.268-279, Cambridge, UK, December, 2014.
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| SoCC-14 | Sungkap Yeo, Mohammad M. Hossain, Jen-Cheng Huang, and Hsien-Hsin S. Lee. "ATAC: Ambient Temperature-Aware Capping for Power Efficient Datacenters." In Proceedings of the ACM Symposium on Cloud Computing, pp.17:1-17:14, Seattle, WA, November, 2014.
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| IPDPS | Jen-Cheng Huang, Lifeng Nai, Hyesoon Kim, and Hsien-Hsin S. Lee. "TBPoint: Reducing Simulation Time for Large-Scale GPGPU Kernels." In the 28th International Symposium on Parallel & Distributed Processing Symposium, Phoenix, AZ, 2014.
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| CF-14 | Lifeng Nai, Yinglong Xia, Ching-Yung Lin, Bo Hong, and Hsien-Hsin S. Lee. "Cache-Conscious Graph Collaborative Filtering on Multi-socket Multicore Systems." In Proceedings of the ACM International Conference on Computing Frontiers, Cagliari, Italy, May, 2014.
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2013
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| IPDPSW | Lifeng Nai and Hsien-Hsin S. Lee. "Reducing False Transactional Conflicts With Speculative Sub-blocking State - An Empirical Study for ASF Transactional Memory System." In the 27th International Symposium on Parallel & Distributed Processing Workshops and PhD Forum, Boston, MA, May, 2013.
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| ISCA-40 | Nak Hee Seong, Sungkap Yeo, and Hsien-Hsin S. Lee. "Tri-Level-Cell Phase Change Memory: Toward an Efficient and Reliable Memory System." In Proceedings of the 40th International Symposium on Computer Architecture, pp.440-451, Tel-Aviv, Israel, June, 2013.
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| J. Supercomput | Hong Jun Choi, Dong Oh Son, Seung Gu Kang, Jong Myon Kim, Hsien-Hsin Lee, and Cheol Hong Kim. "An Efficient Scheduling Scheme Using Estimated Execution Time for Heterogeneous Computing Systems." In Jounral of Supercomputing, Vol.65, Issue 2, pp.886-902, 2013..
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| IEEE TVLSI | Dong Hyuk Woo, Nak Hee Seong, and Hsien-Hsin S. Lee. "Pragmatic Integration of An SRAM Row Cache in Heterogeneous 3-D DRAM Architecture using TSV." In IEEE Transactions on Very Large Scale Integration Systems, Vol.21, No.1, pp.1-13, January, 2013.
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2012
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| CloudCom | Mohammad M. Hossain, Jen-Cheng Huang, and Hsien-Hsin S. Lee. "Migration Energy-Aware Workload Consolidation in Enterprise Clouds." In Proceedings of the IEEE International Conference on Cloud Computing Technology and Science, pp.405-410, December, 2012.
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| IEEE Computer | Sungkap Yeo and Hsien-Hsin S. Lee. "SimWare: A Holistic Warehouse-scale Computer Simulator." In IEEE Computer, Volume 45, Number 9, pp.48-55, September, 2012.
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| ICCSA | Hong Jun Choi, Young Jin Park, Hsien-Hsin Lee, and Cheol Hong Kim. "Adaptive Dynamic Frequency Scaling for Thermal-Aware 3D Multi-core Processors." In the Proceedings of the 12th International Conference on Computational Science and Its Applications, pp.602-612, Salvador de Bahia, Brazil, 2012.
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| WDDD | Sungkap Yeo, Nak Hee Seong, and Hsien-Hsin S. Lee. "Can Multi-Level Cell PCM Be Reliable and Usable? Analyzing the Impact of Resistance Drift." In the 10th Annual Workshop on Duplicating, Deconstructing and Debunking in conjunction with the 39th International Symposium on Computer Architecture, Portland, OR, June, 2012.
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| Data Centers | Sungkap Yeo and Hsien-Hsin S. Lee. "Peeling the Power Onion of Data Centers." Chapter 3 in Energy Efficient Thermal Management of Data Centers, pp.137-168, Yogendra Joshi and Pramod Kumar (Editors), Springer, 2012.
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| ISSCC | Dae Hyun Kim, Krit Athikulwongse, Michael B. Healy, Mohammad M. Hossain, Moongon Jung, Ilya Khorosh, Gokul Kumar, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Shreepad Panth, Mohit Pathak, Minzhen Ren, Guanhao Shen, Taigon Song, Dong Hyuk Woo, Xin Zhao, Joungho Kim, Ho Choi, Gabriel H. Loh, Hsien-Hsin S. Lee, and Sung Kyu Lim. "3D-MAPS: 3D Massively Parallel Processor with Stacked Memory." In Technical Digest of the IEEE International Solid-State Circuits Conference, pp.188-190, San Francisco, CA, 2012.
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| 3DIC | Xiaodong Wang, Dilip Vasudevan, and Hsien-Hsin S. Lee. "Global Built-In Self-Repair for 3-D Memories with Redundancy Sharing and Parallel Testing." In Proceedings of the IEEE International 3D System Integration Conference, Osaka, Japan, 2012.
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2011
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| ANCS | Jen-Cheng Huang, Matteo Monchiero, Yoshio Turner, and Hsien-Hsin S. Lee. "Ally: OS-Transparent Packet Inspection Using Sequestered Cores." In Proceedings of the ACM/IEEE Symposium on Architectures for Networking and Communications Systems, pp.1-11, Brooklyn, NY, October, 2011. (Best Paper Award of ANCS 2011)
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| ICCD | Dean L. Lewis, Shreepad Panth, Xin Zhao, Sung Kyu Lim, and Hsien-Hsin S. Lee. "Designing 3D Test Wrappers for Pre-bond and Post-bond Test of 3D Embedded Cores." In Proceedings of the XXIX IEEE International Conference on Computer Design, pp.90-95, University of Massachusetts, Amherst, USA, October, 2011.
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| ICPP | Mrinmoy Ghosh, Ripal Nathuji, Min Lee, Karsten Schwan, and Hsien-Hsin S. Lee. "Symbiotic Scheduling for Shared Caches in Multi-Core Systems Using Memory Footprint Signature." In Proceedings of the 40th IEEE International Conference on Parallel Processing, pp.11-20, Taipei, Taiwan, September, 2011.
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| MWSCAS | Dong Hyuk Woo, Nak Hee Seong, and Hsien-Hsin S. Lee. "Heterogeneous Die Stacking of SRAM Row Cache and 3-D DRAM: An Empirical Design Evaluation." In Proceedings of the 54th IEEE International Midwest Symposium on Circuits and Systems, pp.1-4, Seoul, Korea, August, 2011. (An Invited Paper)
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| ACM TODAES | Michael B. Healy, Fayez Mohamood, Hsien-Hsin S. Lee, and Sung Kyu Lim. "Integrated Microarchitectural Floorplanning and Runtime Controller for Inductive Noise Mitigation." ACM Transactions on Design Automation of Electronic Systems, Vol.16, Issue 4, October, 2011.
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| IEEE Computer | Sungkap Yeo and Hsien-Hsin S. Lee. "Using Mathematical Modeling in Provisioning a Heterogeneous Cloud Computing Environment." In IEEE Computer, Volume 44, Number 8, pp.55-62, August, 2011.
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| IEEE TCAD | Xin Zhao, Dean Lewis, Hsien-Hsin S. Lee, and Sung Kyu Lim. "Low-Power Clock Tree Design for Pre-Bond Testing of 3D Stacked ICs." In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 30, Issue 5, pp.732-745, 2011.
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| GPU Computing GEMS | Abderrahim Benquassmi, Eric Fontaine, and Hsien-Hsin S. Lee. "Parallelization of Katsevich CT Image Reconstruction Algorithm on Generic Multi-Core Processors and GPGPU." In GPU Computing GEMS, Section 10 Medical Imaging, Chapter 41, Wen-Mei Hwu (editor in chief), pp.658-577, Morgan Kaufmann Publishers, 2011.
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| JILP | Ahmad Sharif and Hsien-Hsin S. Lee. "Data Prefetching by Exploiting Global and Local Access Patterns." In the Journal of Instruction-Level Parallelism, Volume 13, 2011, ISSN 1942-9525.
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| IEEE MICRO | Nak Hee Seong, Dong Hyuk Woo, and Hsien-Hsin S. Lee. "Security Refresh: Protect Phase-Change Memory against Malicious Wear-out." In IEEE MICRO special issue on Top Picks from the Computer Architecture Conferences of 2010, pp.119-127, January/February, 2011.
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2010
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| MICRO-43 | Nak Hee Seong, Dong Hyuk Woo, Vijayalakshmi Srinivasan, Jude A. Rivers, and Hsien-Hsin S. Lee. "SAFER: Stuck-At-Fault Error Recovery for Memories." In Proceedings of the 43th ACM/IEEE International Symposium on Microarchitecture, pp.115-124, Atlanta, Georgia, December, 2010.
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| 3D-TEST | Dean Lewis, Michael Healy, Mohammad Hossain, Tzu-Wei Lin, Mohit Pathak, Hemant Sane, Sung Kyu Lim, Gabriel Loh, and Hsien-Hsin S. Lee. "Design and test of 3D-MAPS, a 3D Die-Stack Many-Core Processor." In the first IEEE International Workshop on Testing Three-Dimensional Stacked Integrated Circuits (poster), Austin, Texas, November, 2010.
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| CICC | Michael B. Healy, Krit Athikulwongse, Rohan Goel, Mohammad M. Hossain, Dae Hyun Kim, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Moongon Jung, Brian Ouellette, Mohit Pathak, Hemant Sane, Guanhao Shen, Dong Hyuk Woo, Xin Zhao, Gabriel H. Loh, Hsien-Hsin S. Lee, and Sung Kyu Lim. "Design and Analysis of 3D-MAPS: A Many-Core 3D Processor with Stacked Memory." In Proceedings of the IEEE Custom Integrated Circuits Conference, San Jose, California, September, 2010. (Intel/CICC Student Scholarship Award)
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| ISCA-37 | Nak Hee Seong, Dong Hyuk Woo, and Hsien-Hsin S. Lee. "Security Refresh: Prevent Malicious Wear-out and Increase Durability for Phase-Change Memory with Dynamically Randomized Address Mapping." In Proceedings of the 37th International Symposium on Computer Architecture, pp.383-394, Saint-Malo, France, June, 2010. (One of the 11 papers selected as IEEE MICRO's Top Picks from the Computer Architecture Conferences of 2010)
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| ACM TACO | Dong Hyuk Woo, Joshua B. Fryman, Allan D. Knies, and Hsien-Hsin S. Lee. "Chameleon: Virtualizing Idle Acceleration Cores of A Heterogeneous Multi-Core Processor for Caching and Prefetching." In ACM Transactions on Architecture and Code Optimization, Vol. 7, No. 1, pp.3:1-3:35, April, 2010.
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| JPDC | Jun Yang, Lan Gao, Youtao Zhang, Marek Chrobak, and Hsien-Hsin S. Lee. "A Low-Cost Memory Remapping Scheme for Address Bus Protection." In Journal of Parallel and Distributed Computing, Elsevier, Vol. 70, Issue 5, pp.443-457, 2010.
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| ASPLOS XV | Dong Hyuk Woo and Hsien-Hsin S. Lee. "COMPASS: A Programmable Data Prefetcher Using Idle GPU Shaders." In Proceedings of the 15th International Conference on Architectural Support for Programming Languages and Operating Systems, pp.297-309, Pittsburgh, PA, March, 2010.
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| HPCA-16 | Dong Hyuk Woo, Nak Hee Seong, Dean L. Lewis, and Hsien-Hsin S. Lee. "An Optimized 3D-Stacked Memory Architecture by Exploiting Excessive, High-Density TSV Bandwidth." In Proceedings of the 16th International Symposium on High-Performance Computer Architecture, pp.429-440, Bangalore, India, January, 2010.
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2009
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| ICCAD | Xin Zhao, Dean L. Lewis, Hsien-Hsin S. Lee, and Sung Kyu Lim. "Pre-bond Testable Low-Power Clock Tree Design for 3D Stacked ICs." In Proceedings of the 2009 International Conference on Computer-Aided Design, pp.184-190, San Jose, CA, November, 2009. (Nominated for the Best Paper Award by ICCAD-09)
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| 3DIC | Dean L. Lewis and Hsien-Hsin S. Lee. "Architectural Evaluation of 3D Stacked RRAM Caches." In IEEE International 3D System Integration Conference, San Francisco, CA, September, 2009.
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| IEEE D&T | Hsien-Hsin S. Lee and Krishnendu Chakrabarty. "Test Challenges for 3D Integrated Circuits." In IEEE Design & Test of Computers, Special Issue on 3D IC Design and Test, Vol.26, Issue 5, pg. 26-35, Sept/Oct, 2009.
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| ISLPED | Mrinmoy Ghosh, Simon Ford, Emre Özer, Stuart Biles, and Hsien-Hsin S. Lee. "Way Guard: A Segmented Counting Bloom Filter Approach to Reducing Energy for Set-Associative Caches." In International Symposium on Low Power Electronics and Design, pp.165-170, San Francisco, CA, August, 2009. (Selected as one of seven papers of the conference highlight for publicity and press.)
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| ISVLSI | Dean L. Lewis and Hsien-Hsin S. Lee. "Testing Circuit-Partitioned 3D IC Designs." In IEEE Computer Society Annual Symposium on VLSI, Tampa, FL, May, 2009.
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| ISVLSI | Dean L. Lewis, Sudhakar Yalamanchili, and Hsien-Hsin S. Lee. "High Performance Non-blocking Switch Design in 3D Die-Stacking Technology." In IEEE Computer Society Annual Symposium on VLSI, Tampa, FL, May, 2009.
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| ACM OSR | Dong Hyuk Woo and Hsien-Hsin S. Lee. "PROPHET: Goal-Oriented Provisioning for Highly Tunable Multicore Processors in Cloud Computing." In ACM SIGOPS Operating Systems Review special issue on the Interaction among the OS, Compilers, and Multicore Processors, Vol. 43, No. 2, pp.102-103, April, 2009.
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| 3D Integration | Dean L. Lewis and Hsien-Hsin S. Lee. "Test Strategies for 3D Die Stacked Integrated Circuits." In Workshop on 3D Integration --- Technology, Architecture, Design, Automation, and Test in conjunction with Design, Automation and Test in Europe (DATE-09), Nice, France, April, 2009.
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| DPC | Ahmad Sharif and Hsien-Hsin S. Lee. "Data Prefetching Mechanism by Exploiting Global and Local Access Patterns." In The Journal of Instruction-Level Parallelism Data Prefetching Championship (DPC-1), Raleigh, NC, February, 2009.
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| ASP-DAC | Michael Healy, Hsien-Hsin S. Lee, Gabriel H. Loh, and Sung Kyu Lim. "Thermal Optimization in Multi-Granularity Multi-Core Floorplanning." In Proceedings of the 14th IEEE/ACM Asia South Pacific Design Automation Conference, pp.43-48, Yokohama, Japan, 2009.
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2008
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| IEEE Computer | Dong Hyuk Woo and Hsien-Hsin S. Lee. "Extending Amdahl's Law for Energy-Efficient Computing in the Many-Core Era." In IEEE Computer, Vol. 41, No. 12, pp.24-31, December, 2008.
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| MICRO-41 | Vikas R. Vasisht and Hsien-Hsin S. Lee. "SHARK: Architectural Support for Autonomic Protection Against Stealth by Rootkit Exploits." In Proceedings of the 41st ACM/IEEE International Symposium on Microarchitecture, pp.106-116, Lake Como, Italy, November, 2008.
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| JSA | Fayez Mohamood, Mrinmoy Ghosh, and Hsien-Hsin S. Lee. "DLL-Conscious Instruction Fetch Optimization for SMT Processors." In Journal of Systems Architecture, 54, pp.1089-1100, 2008. |
| IEEE MICRO | Dong Hyuk Woo, Joshua B. Fryman, Allan D. Knies, Marsha Eng, and Hsien-Hsin S. Lee. "POD: A 3D-Integrated Broad-Purpose Acceleration Layer." In IEEE MICRO special issue on Accelerator Architectures, Vol. 28, No. 4, pp.28-40, July/August, 2008.
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| SAMOS VIII | Chinnakrishnan S. Ballapuram and Hsien-Hsin S. Lee. "Improving TLB Energy for Java Applications on JVM." In Proceedings of the IEEE International Symposium on Systems, Architectures, Modeling and Simulation, pp.218-223, Samos, Greece, July, 2008.
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| GH-08 | Ahmad Sharif and Hsien-Hsin S. Lee. "Total Recall: A Debugging Framework for GPUs." In Proceedings of the ACM SIGGRAPH/Eurographics Workshop of Graphics Hardware, pp.13-20, Sarajevo, Bosnia-Herzegovina, June, 2008.
[pdf] [slides] |
| MMCS08 | Hrishikesh Amur, Ripal Nathuji, Mrinmoy Ghosh, Karsten Schwan, and Hsien-Hsin S. Lee. "IdlePower: Application-Aware Management of Processor Idle States." In Workshop on Managed Many-Core Systems co-located with ACM/IEEE International Symposium on High Performance Distributed Computing, Boston, MA, June, 2008.
[pdf] |
| PESPMA08 | Richard M. Yoo and Hsien-Hsin S. Lee. "Helper Transactions: Enabling Thread-Level Speculation via A Transactional Memory System." In Workshop on Parallel Execution of Sequential Programs on Multi-core Architectures in conjuction with ACM/IEEE International Symposium on Computer Architecture (ISCA-35), Beijing, China, June, 2008.
[pdf] [slides] |
| SPAA | Richard M. Yoo and Hsien-Hsin S. Lee. "Adaptive Transaction Scheduling for Transactional Memory Systems." In Proceedings of the 20th ACM Symposium on Parallelism in Algorithms and Architectures in the Special Track on Hardware and Software Techniques to Improve the Programmability of Multicore Machines, pp.169-178, Munich, Germany, June, 2008.
[pdf] [slides] |
| SPAA | Richard M. Yoo, Yang Ni, Adam Welc, Bratin Saha, Ali-Reza Adl-Tabatabai, and Hsien-Hsin S. Lee. "Kicking the Tires of Software Transactional Memory: Why the Going Gets Tough." In Proceedings of the 20th ACM Symposium on Parallelism in Algorithms and Architectures in the Special Track on Hardware and Software Techniques to Improve the Programmability of Multicore Machines, pp.265-274, Munich, Germany, June, 2008.
[pdf] [slides] |
| ASPLOS XIII | Chinnakrishnan S. Ballapuram, Ahmad Sharif, and Hsien-Hsin S. Lee. "Exploiting Access Semantics and Program Behavior to Reduce Snoop Power in Chip Multiprocessors." In Proceedings of the 13th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, pp.60-69, Seattle, WA, March, 2008.
[pdf] [slides] |
| WACI-VI | Eric Fontaine and Hsien-Hsin S. Lee. "Bicephaly: Maximizing Bandwidth by Duplexing Power and Data." In Workshop on Wild and Crazy Ideas in conjunction with International Conference on Architectural Support for Programming Languages and Operating Systems, Seattle, WA, February, 2008.
[pdf] |
| ASP-DAC | Michael Healy, Fayez Mohamood, Hsien-Hsin S. Lee, and Sung Kyu Lim. "A Unified Methodology for Power Supply Noise Reduction in Modern Microarchitecture Design." In Proceedings of the 13th IEEE/ACM Asia South Pacific Design Automation Conference, pp.611-616, Seoul, Korea, January, 2008.
[pdf] |
2007
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| MICRO-40 | Mrinmoy Ghosh and Hsien-Hsin S. Lee. "Smart Refresh: An Enhanced Memory Controller Design for Reducing Energy in Conventional and 3D Die-Stacked DRAMs." In Proceedings of the 40th ACM/IEEE International Symposium on Microarchitecture, pp.134-145, Chicago, IL, December, 2007.
[pdf] [slides] |
| ICPADS-07 | Eric Fontaine and Hsien-Hsin S. Lee. "Optimizing Katsevich Image Reconstruction Algorithm on Multicore Processors." In Proceedings of the 13th IEEE International Conference on Parallel and Distributed Systems, Hsinchu, Taiwan, December, 2007.
[pdf] [slides] |
| ICPADS-07 | Mrinmoy Ghosh and Hsien-Hsin S. Lee. "Virtual Exclusion: An Architectural Approach to Reducing Leakage Energy in Caches for Multiprocessor Systems." In Proceedings of the 13th IEEE International Conference on Parallel and Distributed Systems, Hsinchu, Taiwan, December, 2007.
[pdf] [slides] |
| ITC-07 | Dean L. Lewis and Hsien-Hsin S. Lee. "A Scan-Island Based Design Enabling Pre-bond Testability in Die-Stacked Microprocessors." In Proceedings of the International Test Conference, Santa Clara, CA, October, 2007.
[pdf] [slides] |
| IISWC-07 | Richard M. Yoo, Hsien-Hsin S. Lee, Han Lee and Kingsum Chow. "Hierarchical Means: Single Number Benchmarking with Workload Cluster Analysis." In Proceedings of the 2007 IEEE International Symposium on Workload Characterization, pp.204-213, Boston, MA, September, 2007.
[pdf] [slides] |
| HPEC-07 | Dong Hyuk Woo, Joshua B. Fryman, Allan D. Knies, Marsha Eng, and Hsien-Hsin S. Lee. "POD: A Parallel-On-Die Architecture." In the 11th Annual Workshop on High Performance Embedded Computing, Lexington, Massachusetts, September, 2007. (One of four finalists for the Best Paper Award.)
[pdf] [slides] |
| FPL-07 | Taeweon Suh, Shih-Lien L. Lu and Hsien-Hsin S. Lee. "An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems." In Proceedings of the 17th International Conference on Field Programmable Logic and Applications, Amsterdam, Netherlands, August, 2007. (Nominated for the Best Paper Award.)
[pdf] [slides] |
| CF-07 | Weidong Shi and Hsien-Hsin S. Lee. "Accelerating Memory Decryption and Authentication with Frequent Value Prediction." In Proceedings of the ACM International Conference on Computing Frontiers, pp.35-46, Ischia, Italy, May, 2007.
[pdf] [slides] |
| FPGA07 | Taeweon Suh, Hsien-Hsin S. Lee, Shih-Lien Lu, and John Shen. "Coherence Traffic Considered Harmful - An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems." In the 15th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Monterey, CA, February, 2007. |
| CMPMSI | Dong Hyuk Woo and Hsien-Hsin S. Lee. "Analyzing Performance Vulnerability due to Resource Denial-of-Service Attack on Chip Multiprocessors." In Workshop on Chip Multiprocessor Memory Systems and Interconnects in conjunction with the 13th International Conference on High-Performance Computer Architecture, Phoenix, Arizona, February, 2007.
[pdf] [slides] |
| ESNS07 | Hsien-Hsin S. Lee and Santosh Pande. "Secure Processing On-Chip." In Army Research Office Planning Workshop on Embedded Systems and Network Security, Raleigh, North Carolina, February, 2007.
[pdf] [slides] |
| ASP-DAC | Fayez Mohamood, Michael Healy, Sung Kyu Lim, and Hsien-Hsin S. Lee. "Noise-Direct: A Technique for Power Supply Noise Aware Floorplanning Using Microarchitecture Profiling." In Proceedings of the 12th Asia and South Pacific Design Automation Conference, pp.786-791, Yokohama, Japan, January, 2007.
[pdf] [slides] |
| IEEE TCAD | Michael Healy, Mario Vittes, Mongkol Ekpanyapong, Chinnakrishnan Ballapuram, Sung Kyu Lim, Hsien-Hsin S. Lee, and Gabriel H. Loh. "Multi-Objective Microarchitectural Floorplanning For 2D and 3D ICs." In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 26, No. 1, pp.38-52, 2007.
[pdf] |
| IEEE TC | Xiaotong Zhuang and Hsien-Hsin S. Lee. "Reducing Cache Pollution via Dynamic Data Prefetch Filtering." In IEEE Transactions on Computers, Vol. 56, No.1, pp.18-31, January, 2007.
[pdf] |
2006
|
| MICRO-39 | Fayez Mohamood, Michael Healy, Sung Kyu Lim, and Hsien-Hsin S. Lee. "A Floorplan-Aware Dynamic Inductive Noise Controller for Reliable Processor Design." In Proceedings of the ACM/IEEE International Symposium on Microarchitecture, pp.3-14, Orlando, Florida, December, 2006.
[pdf] [slides] |
| MICRO-39 | Weidong Shi and Hsien-Hsin S. Lee. "Authentication Control Point and its Implications for Secure Processor Design." In Proceedings of the ACM/IEEE International Symposium on Microarchitecture, pp.103-112, Orlando, Florida, December, 2006.
[pdf] [slides] |
| IBM PAC2 | Mrinmoy Ghosh and Hsien-Hsin S. Lee. "DRAMdecay: Using Decay Counters to Reduce Energy Consumption in DRAMs." In Proceedings of the 3rd Watson Conference on Interaction between Architecture, Circuits, and Compilers (P=AC2), Yorktown Heights, NY, October, 2006.
[pdf] |
| IISWC-06 | Richard M. Yoo, Han Lee, Kingsum Chow and Hsien-Hsin S. Lee. "Constructing a Non-Linear Model with Neural Networks For Workload Characterization." In Proceedings of the 2006 IEEE International Symposium on Workload Characterization, pp.150-159, San Jose, California, October, 2006.
[pdf] [slides] |
| CASES-06 | Dong Hyuk Woo, Mrinmoy Ghosh, Emre Özer, Stuart Biles, and Hsien-Hsin S. Lee. "Reducing Energy of Virtual Cache Synonym Lookup using Bloom Filters." In Proceedings of the ACM/IEEE International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, pp.179-189, Seoul, Korea, October, 2006.
[pdf] [slides] |
| CASES-06 | Chinnakrishnan Ballapuram, Kiran Puttaswamy, Gabriel H. Loh, and Hsien-Hsin S. Lee. "Entropy-based Low Power Data TLB Design." In Proceedings of the ACM/IEEE International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, pp.304-311, Seoul, Korea, October, 2006.
[pdf] [slides] |
| JPDC | Chenghuai Lu, Tao Zhang, Weidong Shi, and Hsien-Hsin S. Lee. "M-TREE: A High Efficiency Security Architecture for Protecting Integrity and Privacy of Software." In Journal of Parallel and Distributed Computing for a special issue on Security in Grid and Distributed Systems, Vol. 66, issue 9, pp.1116-1128, 2006.
[pdf] |
| GH-06 | Weidong Shi, Hsien-Hsin S. Lee, Richard M. Yoo, and Alexandra Boldyreva. "A Digital Rights Enabled Graphics Processing System." In Proceedings of the ACM SIGGRAPH/Eurographics Workshop of Graphics Hardware, pp.17-26, Vienna, Austria, September, 2006.
[pdf] [slides] |
| PACT-15 | Lan Gao, Jun Yang, Marek Chrobak, Youtao Zhang, San Nguyen, and Hsien-Hsin S. Lee. "A Low-cost Memory Remapping Scheme for Address Bus Protection." In Proceedings of the 15th International Conference on Parallel Architectures and Compilation Techniuqes, pp.74-83, Seattle, WA, September, 2006.
[pdf] [slides] |
| Transactions on HiPEAC | Weidong Shi, Chenghuai Lu, and Hsien-Hsin S. Lee. "Memory-centric Security Architecture." In Transactions on High-Performance Embedded Architectures and Compilers, Vol. 1, pp.95-115, 2007. |
| IEEE TCAD | Mongkol Ekpanyapong, Jacob Minz, Thaisiri Watewai, Hsien-Hsin S. Lee, and Sung Kyu Lim. "Profile-Guided Microarchitectural Floorplanning for Deep Submicron Processor Design." In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 25, No.7, pp.1289-1300, July, 2006.
[pdf] |
| SIGDA Ph.D. forum | Taeweon Suh and Hsien-Hsin S. Lee. "Integration of Cache Coherence Protocols for MPSoCs and Coherence Traffic Evaluation using FPGA." In the 9th SIGDA Ph.D. forum in conjunction with the 43rd Design Automation Conference, San Francisco, CA, July, 2006. |
| ISCA-33 | Weidong Shi, Hsien-Hsin S. Lee, Laura Falk, and Mrinmoy Ghosh. "An Integrated Framework for Dependable and Revivable Architecture Using Multicore Processors." In Proceedings of the 33rd International Symposium on Computer Architecture, pp. 102-113, Boston, MA, June, 2006.
[pdf] [slides] |
| ARCS-06 | Mrinmoy Ghosh, Emre Özer, Stuart Biles, and Hsien-Hsin S. Lee. "Efficient System-on-Chip Energy Management with a Segmented Bloom Filter." In Proceedings of the 19th International Conference on Architecture of Computing Systems, pp. 283-297,Frankfurt/Main, Germany, March, 2006.
[pdf] [slides] |
| DATE-06 | Michael Healy, Mario Vittes, Mongkol Ekpanyapong, Chinnakrishnan Ballapuram, Sung Kyu Lim, Hsien-Hsin S. Lee, and Gabriel H. Loh. "Microarchitectural Floorplanning Under Performance and Temperature Tradeoff." In Proceedings of the Design, Automation and Test in Europe, pp.1288-1293, Munich, Germany, March, 2006.
[pdf] [slides] |
| HPCA-12 | Weidong Shi, Joshua B. Fryman, Guofei Gu, Hsien-Hsin S. Lee, Youtao Zhang, and Jun Yang. "InfoShield: A Security Architecture for Protecting Information Usage in Memory." In Proceedings of the 12th International Symposium on High-Performance Computer Architecture, pp.225-234, Austin, TX, February, 2006.
[pdf] [slides] |
| WARFP | Taeweon Suh, Hsien-Hsin S. Lee, Shih-Lien Lu, and John Shen. "Initial Observations of Hardware/Software Co-Simulation using FPGA in Architecture Research." In Workshop on Architecture Research using FPGA Platforms in conjunction with International Symposium on High-Performance Computer Architecture, Austin, Texas, February, 2006.
[pdf] [slides] |
2005
|
| HiPEAC | Weidong Shi, Chenghuai Lu, and Hsien-Hsin S. Lee. "Memory-centric Security Architecture." In Proceedings of the 2005 International Conference on High Performance Embedded Architectures and Compilers, pp.153-168, Barcelona, Spain, November, 2005.
[pdf] [slides] |
| IBM PAC2 | Fayez Mohamood, Mrinmoy Ghosh, and Hsien-Hsin S. Lee. "DLL-Conscious Instruction Fetch Optimization for SMT Processors." In Proceedings of the 2nd Watson Conference on Interaction between Architecture, Circuits, and Compilers (P=AC2), pp.143-152, Yorktown Heights, NY, September, 2005. (Best Paper Selected by TPC)
[slides] |
| ISLPED | Chinnakrishnan S. Ballapuram, Hsien-Hsin S. Lee, and Milos Prvulovic. "Synonymous Address Compaction for Energy Reduction in Data TLB." In Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED-05), pp. 357-362, San Diego, California, August, 2005.
[pdf] [slides] |
| DAC-42 | Taeweon Suh, Daehyun Kim, and Hsien-Hsin S. Lee. "Cache Coherence Support for Non-Shared Bus Architecture on Heterogeneous MP SoCs." In Proceedings of the 42nd Design Automation Conference (DAC-42), pp.553-558, Anaheim, California, June, 2005.
[pdf] [slides] |
| ISCA-32 | Weidong Shi, Hsien-Hsin S. Lee, Mrinmoy Ghosh, Chenghuai Lu, and Alexandra Boldyreva. "High Efficiency Counter Mode Security Architecture via Prediction and Precomputation." In the Proceedings of the 32nd International Symposium on Computer Architecture, pp.14-24, Madison, Wisconsin, June, 2005.
[pdf] [slides] |
| ICAC | Weidong Shi, Hsien-Hsin S. Lee, Guofei Gu, Mrinmoy Ghosh, Laura Falk, and Trevor N. Mudge. "Intrusion Tolerant and Self-Recoverable Network Service System Using Security Enhanced Chip Multiprocessors." In the Proceedings of the 2nd International Conference on Autonomic Computing, pp.263-273, Seattle, Washington, June, 2005.
[pdf] [slides] |
| CF | Martin Schulz, Brian S. White, Sally A. McKee, Hsien-Hsin S. Lee, and Jurgen Jeitner. "Owl: Next Generation System Monitoring." In Proceedings of the ACM Computing Frontiers 2005, pp.116-124, Ischia, Italy, May, 2005.
[pdf] |
| ISCAS | Mongkol Ekpanyapong, Sung Kyu Lim, Chinnakrishnan Ballapuram, and Hsien-Hsin S. Lee. "Wire-driven Microarchitectural Design Space Exploration." In the Proceedings of the 2005 IEEE International Symposium on Circuits and Systems, pp.1867-1870, Kobe, Japan, May, 2005.
[pdf] [slides] |
| CAN | Weidong Shi, Hsien-Hsin S. Lee, Chenghuai Lu, and Mrinmoy Ghosh. "Towards the Issues in Architectural Support for Protection of Software Execution." In ACM SIGARCH Computer Architecture News, Vol. 33, Issue 1, pp.6-15, March, 2005.
[pdf] |
| Perf. Monitor Design | Martin Schulz, Brian White, Sally A. McKee, and Hsien-Hsin Lee. "A Vision for Next Generation System Monitoring." In Workshop on Hardware Performance Monitor Design and Functionality in conjunction with International Symposium on High-Performance Computer Architecture, San Francisco, CA, February, 2005.
[slides] |
| WARFP | Taeweon Suh, Hsien-Hsin S. Lee, Sally A. McKee, and Martin Schulz. "Evaluating System-wide Monitoring Capsule Design Using Xilinx Virtex-II Pro FPGA." In Workshop on Architecture Research using FPGA Platforms in conjunction with International Symposium on High-Performance Computer Architecture, San Francisco, CA, February, 2005.
[pdf] [slides] |
| WARFP | Christopher R. Clark, Ripal Nathuji, and Hsien-Hsin S. Lee. "Using an FPGA as a Prototyping Platform for Multi-core Processor Applications." In Workshop on Architectural Research using FPGA Platforms in conjunction with International Symposium on High-Performance Computer Architecture, San Francisco, CA, February, 2005.
[pdf] |
2004
|
| IEEE MICRO | Taeweon Suh, Hsien-Hsin S. Lee, and Douglas M. Blough. "Integrating Cache Coherence Protocols for Heterogeneous Multiprocessor Systems, Part 2." In IEEE MICRO, pp.70-78, September/October, 2004.
[pdf] |
| DRM | Weidong Shi, Hsien-Hsin S. Lee, Chenghuai Lu, and Tao Zhang. "Attacks and Risk Analysis for Hardware Supported Software Copy Protection Systems." In Proceedings of the 4th ACM Workshop on Digital Rights Management, pp. 54- 62, Washington D.C., October, 2004.
[pdf] |
| WASSA | Weidong Shi, Hsien-Hsin S. Lee, Chenghuai Lu, and Mrinmoy Ghosh. "Towards the Issues in Architectural Support for Protection of Software Execution." In the Workshop on Architectural Support for Security and Anti-Virus in conjunction with the 11th International Conference on Architectural Support for Programming Languages and Operating Systems, pp.1-10, Boston, MA, October, 2004.
[pdf] [slides] |
| PACT-13 | Weidong Shi, Hsien-Hsin S. Lee, Mrinmoy Ghosh, and Chenghuai Lu. "Architectural Support for High Speed Protection of Memory Integrity and Confidentiality in Multiprocessor Systems." In Proceedings of the International Conference on Parallel Architecture and Compilation Techniques, pp.123-134, Antibes Juan-les-Pins, France, September, 2004.
[pdf] [slides] |
| CASES | Xiaotong Zhuang, Tao Zhang, Hsien-Hsin S. Lee, and Santosh Pande. "Hardware Assisted Control Flow Obfuscation for Embedded Processors." In Proceedings of the International Conference on Compilers Architecture Synthesis for Embedded Systems, pp.292-302, Washington D.C., September, 2004. (Best Paper Awarded)
[pdf] [slides] |
| SOCC | Mrinmoy Ghosh, Weidong Shi, and Hsien-Hsin S. Lee. "CoolPression - A Hybrid Significance Compression Technique for Reducing Energy in Caches." In Proceedings of the IEEE International System-On-Chip Conference, pp. 399-402, Santa Clara, California, September, 2004.
[pdf] [slides] |
| ACSAC | Mongkol Ekpanyapong, Pinar Korkmaz, and Hsien-Hsin S. Lee. "Choice Predictor for Free." In Proceedings of the 9th Asia-Pacific Computer Systems Architecture Conference, pp. 399-413, Beijing, China, September, 2004.
[pdf] [slides] |
| IEEE MICRO | Taeweon Suh, Hsien-Hsin S. Lee, and Douglas M. Blough. "Integrating Cache Coherence Protocols for Heterogeneous Multiprocessor Systems, Part 1." In IEEE MICRO special issue on Embedded Systems: Architecture, Design and Tools, pp.33-41, July/August, 2004.
[pdf] |
| DAC-41 | Mongkol Ekpanyapong, Jacob R. Minz, Thaisiri Watewai, Hsien-Hsin S. Lee, and Sung Kyu Lim. "Profile-Guided Microarchitectural Floorplanning for Deep Submicron Processor Design." In Proceedings of the 41st Design Automation Conference, pp. 634-639, San Diego, California, June, 2004.
[pdf] [slides] |
| DATE | Taeweon Suh, Douglas M. Blough, and Hsien-Hsin S. Lee. "Supporting Cache Coherence in Heterogeneous Multiprocessor Systems." In Proceedings of the Design, Automation and Test in Europe Conference, pp.1150-1155, Paris, France, February, 2004.
[pdf] [slides] |
2003
|
| ICCAD | Yuvraj S. Dhillon, Abdulkadir U. Diril, Abhijit Chatterjee, and Hsien-Hsin S. Lee. "Algorithm for Achieving Minimum Energy Consumption in CMOS Circuits Using Multiple Supply and Threshold Voltages at the Module Level." In Digest of Technical Papers of the International Conference on Computer-Aided Design, pp.693-700, San Jose, California, November, 2003.
[pdf] [slides] |
| ICPP | Xiaotong Zhuang and Hsien-Hsin S. Lee. "A Hardware Based Cache Pollution Filtering Mechanism for Aggressive Prefetches." In Proceedings of the 2003 International Symposium on Parallel Processing, pp.286-293, Kaohsiung, Taiwan, October, 2003.
[pdf] [slides] |
| IEEE MICRO | Joshua B. Fryman, Chad M. Huneycutt, Hsien-Hsin S. Lee, Kenneth M. Mackenzie, and David E. Schimmel. "Energy Efficient Network Memory for Ubiquitous Devices." In IEEE MICRO special issue on Power Complexity Aware Design, pp.60-70, September/October, 2003.
[pdf] |
| ISLPED | Hsien-Hsin S. Lee and Chinnakrishnan S. Ballapuram. "Energy Efficient D-TLB and Data Cache using Semantic-Aware Multilateral Partitioning." In Proceedings of the International Symposium on Low Power Electronics and Design, pp. 306-311, Seoul, Korea, August, 2003.
[pdf] [slides] |
| WCED | Hsien-Hsin S. Lee, Joshua B. Fryman, A. Utku Diril, and Yuvraj S. Dhillon. "The Elusive Metric for Low-Power Architecture Research." In the Workshop on Complexity-Effective Design in conjunction with the 30th International Symposium on Computer Architecture, San Diego, California, June, 2003.
[pdf] [slides] |
| CGO | Mikhail Smelyanskiy, Scott A. Mahlke, Edward S. Davidson, and Hsien-Hsin S. Lee. "Predicate-aware Scheduling: A Technique for Reducing Resource Constraints." In Proceedings of the Annual IEEE/ACM International Symposium on Code Generation and Optimization, pp.169-178, San Francisco, California, 2003.
[pdf] [slides] |
2001
|
| JILP | Hsien-Hsin S. Lee, Gary S. Tyson, and Matthew K. Farrens. "Improving Bandwidth Utilization using Eager Writebacks." In Journal of Instruction-Level Parallelism, Vol. 3, 2001.
[pdf] |
| HPCA-07 | Hsien-Hsin S. Lee, Mikhail Smelyanskiy, Chris J. Newburn, and Gary S. Tyson. "Stack Value File: Custom Microarchitecture for the Stack." In Proceedings of the 7th IEEE International Symposium on High Performance Computer Architecture, pp.5-14, Monterrey, Mexico, January, 2001.
[pdf] [slides] |
2000
|
| MICRO-33 | Hsien-Hsin S. Lee, Gary S. Tyson, and Matthew K. Farrens. "Eager Writeback - a Technique for Improving Bandwidth Utilization." In Proceedings of the 33rd ACM/IEEE International Symposium on Microarchitecture, pp.11-21, Monterey, California, December, 2000. (Best Paper Awarded)
[pdf] [slides] |
| CASES | Hsien-Hsin S. Lee and Gary S. Tyson. "Region-based Caching: an Energy Efficient Memory Architecture for Embedded Processors." In Proceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, pp.120-127, San Jose, California, November, 2000.
[pdf] |
| ISPASS | Hsien-Hsin Lee, Youfeng Wu, and Gary Tyson. "Quantifying Instruction-Level Parallelism Limits on an EPIC Architecture." In Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, pp.21-27, Austin, Texas, April, 2000.
[pdf] |
1999
|
| ITJ | Paul Zagacki, Deep Buch, Emile Hsieh, Daniel Melaku, Vladimir Pentkovski, and Hsien-Hsin Lee. "Architecture of a 3D Software Stack for Peak Pentium III Processor Performance." In Intel Technology Journal, Q2, May, 1999.
[pdf] |
1994
|
| ICPP | Eric Boyd, Waqar Azeem, Hsien-Hsin Lee, Tien-Pao Shih, Shih-Hao Hung, and Edward Davidson. "A Hierarchical Approach to Modeling and Improving the Performance of Scientific Applications on the KSR1." In Proceedings of the 1994 International Conference on Parallel Processing, pp.188-192, St. Charles, Illinois, August, 1994.
[pdf] |
|
Theses
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Ph.D.
|
| Dean L. Lewis. "Design for Pre-bond Testability in 3D Integrated Circuits." School of Electrical and Computer Engineering, Georgia Institute of Technology, 2012.
[pdf] |
| Nak Hee Seong. "A Reliable, Secure Phase-Change Memory as a Main Memory." School of Electrical and Computer Engineering, Georgia Institute of Technology, 2012.
[pdf] |
| Dong Hyuk Woo. "Designing Heterogeneous Many-Core Processors to Provide High Performance under Limited Chip Power Budget." School of Electrical and Computer Engineering, Georgia Institute of Technology, 2010.
[pdf] |
| Mrinmoy Ghosh. "Microarchitectual Techniques to Reduce Energy Consumption in the Memory Hierarchy." School of Electrical and Computer Engineering, Georgia Institute of Technology, 2009.
[pdf] |
| Chinnakrishnan S. Ballapuram. "Semantics-Oriented Low Power Architecture." School of Electrical and Computer Engineering, Georgia Institute of Technology, 2008. |
| Taeweon Suh. "Integration and Evaluation of Cache Coherence Protocols for Multiprocessor SoCs." School of Electrical and Computer Engineering, Georgia Institute of Technology, 2006.
[pdf] |
| Weidong Shi. "Architectural Support for Protecting Memory Integrity and Confidentiality." College of Computing, Georgia Institute of Technology, 2006.
[pdf] |
| Joshua Bruce Fryman. "SoftCache Architecture." College of Computing, Georgia Institute of Technology, 2005.
[pdf] |
M.S.
|
| Manoj B. Athreya. "Subverting Linux On-the-fly Using Hardware Virtualization Technology." School of Electrical and Computer Engineering, Georgia Institute of Technology, 2010.
[pdf] |
| Vikas R. Vasisht. "Architectural Support for Autonomic Protection Against Stealth by Rootkit Exploits." School of Electrical and Computer Engineering, Georgia Institute of Technology, 2008.
[pdf] |
| Pratik M. Marolia. "Watermarking FPGA Bitstream for IP Protection." School of Electrical and Computer Engineering, Georgia Institute of Technology, 2008.
[pdf] |
| Richard M. Yoo. "Adaptive Transaction Scheduling for Transactional Memory Systems." School of Electrical and Computer Engineering, Georgia Institute of Technology, 2008.
[pdf] |
| Fayez Mohamood. "DLL-Conscious Instruction Fetch Optimization for SMT Processors." School of Electrical and Computer Engineering, Georgia Institute of Technology, 2006.
[pdf] |
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