| IEEE MICRO | Vivek Parmer, Syed Shakib Sarwar, Ziyun Li, Hsien-Hsin S. Lee, Barbara De Salvo, Manan Suri. "Exploring Memory-Oriented Design Optimization of Edge-AI Hardware for Extended Reality Applications." In IEEE MICRO Special Issue on TinyML, Volume 43, Issue 6, 2023. |
| TinyML-23 | Vivek Parmer, Syed Shakib Sarwar, Ziyun Li, Hsien-Hsin S. Lee, Barbara De Salvo, Manan Suri. "Memory-Oriented Design Space Exploration of Edge-AI Hardware for XR Applications." In tinyML Research Symposium, 2023.
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| MICRO-47 | Jen-Cheng Huang, Joo Hwan Lee, Hyesoon Kim, and Hsien-Hsin S. Lee. "GPUMech: GPU Performance Modeling Technique based on Interval Analysis." In Proceedings of the 47th ACM/IEEE International Symposium on Microarchitecture, pp.268-279, Cambridge, UK, December, 2014.
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| SoCC-14 | Sungkap Yeo, Mohammad M. Hossain, Jen-Cheng Huang, and Hsien-Hsin S. Lee. "ATAC: Ambient Temperature-Aware Capping for Power Efficient Datacenters." In Proceedings of the ACM Symposium on Cloud Computing, pp.17:1-17:14, Seattle, WA, November, 2014.
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| IPDPS | Jen-Cheng Huang, Lifeng Nai, Hyesoon Kim, and Hsien-Hsin S. Lee. "TBPoint: Reducing Simulation Time for Large-Scale GPGPU Kernels." In the 28th International Symposium on Parallel & Distributed Processing Symposium, Phoenix, AZ, 2014.
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| CF-14 | Lifeng Nai, Yinglong Xia, Ching-Yung Lin, Bo Hong, and Hsien-Hsin S. Lee. "Cache-Conscious Graph Collaborative Filtering on Multi-socket Multicore Systems." In Proceedings of the ACM International Conference on Computing Frontiers, Cagliari, Italy, May, 2014.
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| IPDPSW | Lifeng Nai and Hsien-Hsin S. Lee. "Reducing False Transactional Conflicts With Speculative Sub-blocking State - An Empirical Study for ASF Transactional Memory System." In the 27th International Symposium on Parallel & Distributed Processing Workshops and PhD Forum, Boston, MA, May, 2013.
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| ISCA-40 | Nak Hee Seong, Sungkap Yeo, and Hsien-Hsin S. Lee. "Tri-Level-Cell Phase Change Memory: Toward an Efficient and Reliable Memory System." In Proceedings of the 40th International Symposium on Computer Architecture, pp.440-451, Tel-Aviv, Israel, June, 2013.
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| J. Supercomput | Hong Jun Choi, Dong Oh Son, Seung Gu Kang, Jong Myon Kim, Hsien-Hsin Lee, and Cheol Hong Kim. "An Efficient Scheduling Scheme Using Estimated Execution Time for Heterogeneous Computing Systems." In Jounral of Supercomputing, Vol.65, Issue 2, pp.886-902, 2013..
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| IEEE TVLSI | Dong Hyuk Woo, Nak Hee Seong, and Hsien-Hsin S. Lee. "Pragmatic Integration of An SRAM Row Cache in Heterogeneous 3-D DRAM Architecture using TSV." In IEEE Transactions on Very Large Scale Integration Systems, Vol.21, No.1, pp.1-13, January, 2013.
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| ICCSA | Hong Jun Choi, Young Jin Park, Hsien-Hsin Lee, and Cheol Hong Kim. "Adaptive Dynamic Frequency Scaling for Thermal-Aware 3D Multi-core Processors." In the Proceedings of the 12th International Conference on Computational Science and Its Applications, pp.602-612, Salvador de Bahia, Brazil, 2012.
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| WDDD | Sungkap Yeo, Nak Hee Seong, and Hsien-Hsin S. Lee. "Can Multi-Level Cell PCM Be Reliable and Usable? Analyzing the Impact of Resistance Drift." In the 10th Annual Workshop on Duplicating, Deconstructing and Debunking in conjunction with the 39th International Symposium on Computer Architecture, Portland, OR, June, 2012.
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| ICPP | Mrinmoy Ghosh, Ripal Nathuji, Min Lee, Karsten Schwan, and Hsien-Hsin S. Lee. "Symbiotic Scheduling for Shared Caches in Multi-Core Systems Using Memory Footprint Signature." In Proceedings of the 40th IEEE International Conference on Parallel Processing, pp.11-20, Taipei, Taiwan, September, 2011.
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| MWSCAS | Dong Hyuk Woo, Nak Hee Seong, and Hsien-Hsin S. Lee. "Heterogeneous Die Stacking of SRAM Row Cache and 3-D DRAM: An Empirical Design Evaluation." In Proceedings of the 54th IEEE International Midwest Symposium on Circuits and Systems, pp.1-4, Seoul, Korea, August, 2011. (An Invited Paper)
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| ACM TODAES | Michael B. Healy, Fayez Mohamood, Hsien-Hsin S. Lee, and Sung Kyu Lim. "Integrated Microarchitectural Floorplanning and Runtime Controller for Inductive Noise Mitigation." ACM Transactions on Design Automation of Electronic Systems, Vol.16, Issue 4, October, 2011.
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| IEEE TCAD | Xin Zhao, Dean Lewis, Hsien-Hsin S. Lee, and Sung Kyu Lim. "Low-Power Clock Tree Design for Pre-Bond Testing of 3D Stacked ICs." In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 30, Issue 5, pp.732-745, 2011.
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| JILP | Ahmad Sharif and Hsien-Hsin S. Lee. "Data Prefetching by Exploiting Global and Local Access Patterns." In the Journal of Instruction-Level Parallelism, Volume 13, 2011, ISSN 1942-9525.
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| IEEE MICRO | Nak Hee Seong, Dong Hyuk Woo, and Hsien-Hsin S. Lee. "Security Refresh: Protect Phase-Change Memory against Malicious Wear-out." In IEEE MICRO special issue on Top Picks from the Computer Architecture Conferences of 2010, pp.119-127, January/February, 2011.
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| MICRO-43 | Nak Hee Seong, Dong Hyuk Woo, Vijayalakshmi Srinivasan, Jude A. Rivers, and Hsien-Hsin S. Lee. "SAFER: Stuck-At-Fault Error Recovery for Memories." In Proceedings of the 43th ACM/IEEE International Symposium on Microarchitecture, pp.115-124, Atlanta, Georgia, December, 2010.
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| ISCA-37 | Nak Hee Seong, Dong Hyuk Woo, and Hsien-Hsin S. Lee. "Security Refresh: Prevent Malicious Wear-out and Increase Durability for Phase-Change Memory with Dynamically Randomized Address Mapping." In Proceedings of the 37th International Symposium on Computer Architecture, pp.383-394, Saint-Malo, France, June, 2010. (One of the 11 papers selected as IEEE MICRO's Top Picks from the Computer Architecture Conferences of 2010)
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| ASPLOS XV | Dong Hyuk Woo and Hsien-Hsin S. Lee. "COMPASS: A Programmable Data Prefetcher Using Idle GPU Shaders." In Proceedings of the 15th International Conference on Architectural Support for Programming Languages and Operating Systems, pp.297-309, Pittsburgh, PA, March, 2010.
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| HPCA-16 | Dong Hyuk Woo, Nak Hee Seong, Dean L. Lewis, and Hsien-Hsin S. Lee. "An Optimized 3D-Stacked Memory Architecture by Exploiting Excessive, High-Density TSV Bandwidth." In Proceedings of the 16th International Symposium on High-Performance Computer Architecture, pp.429-440, Bangalore, India, January, 2010.
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| ICCAD | Xin Zhao, Dean L. Lewis, Hsien-Hsin S. Lee, and Sung Kyu Lim. "Pre-bond Testable Low-Power Clock Tree Design for 3D Stacked ICs." In Proceedings of the 2009 International Conference on Computer-Aided Design, pp.184-190, San Jose, CA, November, 2009. (Nominated for the Best Paper Award by ICCAD-09)
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| 3DIC | Dean L. Lewis and Hsien-Hsin S. Lee. "Architectural Evaluation of 3D Stacked RRAM Caches." In IEEE International 3D System Integration Conference, San Francisco, CA, September, 2009.
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| IEEE D&T | Hsien-Hsin S. Lee and Krishnendu Chakrabarty. "Test Challenges for 3D Integrated Circuits." In IEEE Design & Test of Computers, Special Issue on 3D IC Design and Test, Vol.26, Issue 5, pg. 26-35, Sept/Oct, 2009.
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| ISLPED | Mrinmoy Ghosh, Simon Ford, Emre Özer, Stuart Biles, and Hsien-Hsin S. Lee. "Way Guard: A Segmented Counting Bloom Filter Approach to Reducing Energy for Set-Associative Caches." In International Symposium on Low Power Electronics and Design, pp.165-170, San Francisco, CA, August, 2009. (Selected as one of seven papers of the conference highlight for publicity and press.)
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| ISVLSI | Dean L. Lewis and Hsien-Hsin S. Lee. "Testing Circuit-Partitioned 3D IC Designs." In IEEE Computer Society Annual Symposium on VLSI, Tampa, FL, May, 2009.
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| ISVLSI | Dean L. Lewis, Sudhakar Yalamanchili, and Hsien-Hsin S. Lee. "High Performance Non-blocking Switch Design in 3D Die-Stacking Technology." In IEEE Computer Society Annual Symposium on VLSI, Tampa, FL, May, 2009.
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| DPC | Ahmad Sharif and Hsien-Hsin S. Lee. "Data Prefetching Mechanism by Exploiting Global and Local Access Patterns." In The Journal of Instruction-Level Parallelism Data Prefetching Championship (DPC-1), Raleigh, NC, February, 2009.
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| ASP-DAC | Michael Healy, Hsien-Hsin S. Lee, Gabriel H. Loh, and Sung Kyu Lim. "Thermal Optimization in Multi-Granularity Multi-Core Floorplanning." In Proceedings of the 14th IEEE/ACM Asia South Pacific Design Automation Conference, pp.43-48, Yokohama, Japan, 2009.
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| MICRO-41 | Vikas R. Vasisht and Hsien-Hsin S. Lee. "SHARK: Architectural Support for Autonomic Protection Against Stealth by Rootkit Exploits." In Proceedings of the 41st ACM/IEEE International Symposium on Microarchitecture, pp.106-116, Lake Como, Italy, November, 2008.
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| JSA | Fayez Mohamood, Mrinmoy Ghosh, and Hsien-Hsin S. Lee. "DLL-Conscious Instruction Fetch Optimization for SMT Processors." In Journal of Systems Architecture, 54, pp.1089-1100, 2008. |
| SAMOS VIII | Chinnakrishnan S. Ballapuram and Hsien-Hsin S. Lee. "Improving TLB Energy for Java Applications on JVM." In Proceedings of the IEEE International Symposium on Systems, Architectures, Modeling and Simulation, pp.218-223, Samos, Greece, July, 2008.
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| MMCS08 | Hrishikesh Amur, Ripal Nathuji, Mrinmoy Ghosh, Karsten Schwan, and Hsien-Hsin S. Lee. "IdlePower: Application-Aware Management of Processor Idle States." In Workshop on Managed Many-Core Systems co-located with ACM/IEEE International Symposium on High Performance Distributed Computing, Boston, MA, June, 2008.
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| PESPMA08 | Richard M. Yoo and Hsien-Hsin S. Lee. "Helper Transactions: Enabling Thread-Level Speculation via A Transactional Memory System." In Workshop on Parallel Execution of Sequential Programs on Multi-core Architectures in conjuction with ACM/IEEE International Symposium on Computer Architecture (ISCA-35), Beijing, China, June, 2008.
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| SPAA | Richard M. Yoo and Hsien-Hsin S. Lee. "Adaptive Transaction Scheduling for Transactional Memory Systems." In Proceedings of the 20th ACM Symposium on Parallelism in Algorithms and Architectures in the Special Track on Hardware and Software Techniques to Improve the Programmability of Multicore Machines, pp.169-178, Munich, Germany, June, 2008.
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| SPAA | Richard M. Yoo, Yang Ni, Adam Welc, Bratin Saha, Ali-Reza Adl-Tabatabai, and Hsien-Hsin S. Lee. "Kicking the Tires of Software Transactional Memory: Why the Going Gets Tough." In Proceedings of the 20th ACM Symposium on Parallelism in Algorithms and Architectures in the Special Track on Hardware and Software Techniques to Improve the Programmability of Multicore Machines, pp.265-274, Munich, Germany, June, 2008.
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| ASPLOS XIII | Chinnakrishnan S. Ballapuram, Ahmad Sharif, and Hsien-Hsin S. Lee. "Exploiting Access Semantics and Program Behavior to Reduce Snoop Power in Chip Multiprocessors." In Proceedings of the 13th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, pp.60-69, Seattle, WA, March, 2008.
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| WACI-VI | Eric Fontaine and Hsien-Hsin S. Lee. "Bicephaly: Maximizing Bandwidth by Duplexing Power and Data." In Workshop on Wild and Crazy Ideas in conjunction with International Conference on Architectural Support for Programming Languages and Operating Systems, Seattle, WA, February, 2008.
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| ASP-DAC | Michael Healy, Fayez Mohamood, Hsien-Hsin S. Lee, and Sung Kyu Lim. "A Unified Methodology for Power Supply Noise Reduction in Modern Microarchitecture Design." In Proceedings of the 13th IEEE/ACM Asia South Pacific Design Automation Conference, pp.611-616, Seoul, Korea, January, 2008.
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| MICRO-40 | Mrinmoy Ghosh and Hsien-Hsin S. Lee. "Smart Refresh: An Enhanced Memory Controller Design for Reducing Energy in Conventional and 3D Die-Stacked DRAMs." In Proceedings of the 40th ACM/IEEE International Symposium on Microarchitecture, pp.134-145, Chicago, IL, December, 2007.
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| ICPADS-07 | Mrinmoy Ghosh and Hsien-Hsin S. Lee. "Virtual Exclusion: An Architectural Approach to Reducing Leakage Energy in Caches for Multiprocessor Systems." In Proceedings of the 13th IEEE International Conference on Parallel and Distributed Systems, Hsinchu, Taiwan, December, 2007.
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| IISWC-07 | Richard M. Yoo, Hsien-Hsin S. Lee, Han Lee and Kingsum Chow. "Hierarchical Means: Single Number Benchmarking with Workload Cluster Analysis." In Proceedings of the 2007 IEEE International Symposium on Workload Characterization, pp.204-213, Boston, MA, September, 2007.
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| FPL-07 | Taeweon Suh, Shih-Lien L. Lu and Hsien-Hsin S. Lee. "An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems." In Proceedings of the 17th International Conference on Field Programmable Logic and Applications, Amsterdam, Netherlands, August, 2007. (Nominated for the Best Paper Award.)
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| CF-07 | Weidong Shi and Hsien-Hsin S. Lee. "Accelerating Memory Decryption and Authentication with Frequent Value Prediction." In Proceedings of the ACM International Conference on Computing Frontiers, pp.35-46, Ischia, Italy, May, 2007.
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| IEEE TC | Xiaotong Zhuang and Hsien-Hsin S. Lee. "Reducing Cache Pollution via Dynamic Data Prefetch Filtering." In IEEE Transactions on Computers, Vol. 56, No.1, pp.18-31, January, 2007.
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| MICRO-39 | Fayez Mohamood, Michael Healy, Sung Kyu Lim, and Hsien-Hsin S. Lee. "A Floorplan-Aware Dynamic Inductive Noise Controller for Reliable Processor Design." In Proceedings of the ACM/IEEE International Symposium on Microarchitecture, pp.3-14, Orlando, Florida, December, 2006.
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| IBM PAC2 | Mrinmoy Ghosh and Hsien-Hsin S. Lee. "DRAMdecay: Using Decay Counters to Reduce Energy Consumption in DRAMs." In Proceedings of the 3rd Watson Conference on Interaction between Architecture, Circuits, and Compilers (P=AC2), Yorktown Heights, NY, October, 2006.
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| IISWC-06 | Richard M. Yoo, Han Lee, Kingsum Chow and Hsien-Hsin S. Lee. "Constructing a Non-Linear Model with Neural Networks For Workload Characterization." In Proceedings of the 2006 IEEE International Symposium on Workload Characterization, pp.150-159, San Jose, California, October, 2006.
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| WARFP | Taeweon Suh, Hsien-Hsin S. Lee, Shih-Lien Lu, and John Shen. "Initial Observations of Hardware/Software Co-Simulation using FPGA in Architecture Research." In Workshop on Architecture Research using FPGA Platforms in conjunction with International Symposium on High-Performance Computer Architecture, Austin, Texas, February, 2006.
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| IBM PAC2 | Fayez Mohamood, Mrinmoy Ghosh, and Hsien-Hsin S. Lee. "DLL-Conscious Instruction Fetch Optimization for SMT Processors." In Proceedings of the 2nd Watson Conference on Interaction between Architecture, Circuits, and Compilers (P=AC2), pp.143-152, Yorktown Heights, NY, September, 2005. (Best Paper Selected by TPC)
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| WARFP | Christopher R. Clark, Ripal Nathuji, and Hsien-Hsin S. Lee. "Using an FPGA as a Prototyping Platform for Multi-core Processor Applications." In Workshop on Architectural Research using FPGA Platforms in conjunction with International Symposium on High-Performance Computer Architecture, San Francisco, CA, February, 2005.
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| ACSAC | Mongkol Ekpanyapong, Pinar Korkmaz, and Hsien-Hsin S. Lee. "Choice Predictor for Free." In Proceedings of the 9th Asia-Pacific Computer Systems Architecture Conference, pp. 399-413, Beijing, China, September, 2004.
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| DAC-41 | Mongkol Ekpanyapong, Jacob R. Minz, Thaisiri Watewai, Hsien-Hsin S. Lee, and Sung Kyu Lim. "Profile-Guided Microarchitectural Floorplanning for Deep Submicron Processor Design." In Proceedings of the 41st Design Automation Conference, pp. 634-639, San Diego, California, June, 2004.
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| ICPP | Xiaotong Zhuang and Hsien-Hsin S. Lee. "A Hardware Based Cache Pollution Filtering Mechanism for Aggressive Prefetches." In Proceedings of the 2003 International Symposium on Parallel Processing, pp.286-293, Kaohsiung, Taiwan, October, 2003.
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| ISLPED | Hsien-Hsin S. Lee and Chinnakrishnan S. Ballapuram. "Energy Efficient D-TLB and Data Cache using Semantic-Aware Multilateral Partitioning." In Proceedings of the International Symposium on Low Power Electronics and Design, pp. 306-311, Seoul, Korea, August, 2003.
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| WCED | Hsien-Hsin S. Lee, Joshua B. Fryman, A. Utku Diril, and Yuvraj S. Dhillon. "The Elusive Metric for Low-Power Architecture Research." In the Workshop on Complexity-Effective Design in conjunction with the 30th International Symposium on Computer Architecture, San Diego, California, June, 2003.
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| CGO | Mikhail Smelyanskiy, Scott A. Mahlke, Edward S. Davidson, and Hsien-Hsin S. Lee. "Predicate-aware Scheduling: A Technique for Reducing Resource Constraints." In Proceedings of the Annual IEEE/ACM International Symposium on Code Generation and Optimization, pp.169-178, San Francisco, California, 2003.
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| JILP | Hsien-Hsin S. Lee, Gary S. Tyson, and Matthew K. Farrens. "Improving Bandwidth Utilization using Eager Writebacks." In Journal of Instruction-Level Parallelism, Vol. 3, 2001.
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| HPCA-07 | Hsien-Hsin S. Lee, Mikhail Smelyanskiy, Chris J. Newburn, and Gary S. Tyson. "Stack Value File: Custom Microarchitecture for the Stack." In Proceedings of the 7th IEEE International Symposium on High Performance Computer Architecture, pp.5-14, Monterrey, Mexico, January, 2001.
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| MICRO-33 | Hsien-Hsin S. Lee, Gary S. Tyson, and Matthew K. Farrens. "Eager Writeback - a Technique for Improving Bandwidth Utilization." In Proceedings of the 33rd ACM/IEEE International Symposium on Microarchitecture, pp.11-21, Monterey, California, December, 2000. (Best Paper Awarded)
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| CASES | Hsien-Hsin S. Lee and Gary S. Tyson. "Region-based Caching: an Energy Efficient Memory Architecture for Embedded Processors." In Proceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, pp.120-127, San Jose, California, November, 2000.
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| ISPASS | Hsien-Hsin Lee, Youfeng Wu, and Gary Tyson. "Quantifying Instruction-Level Parallelism Limits on an EPIC Architecture." In Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, pp.21-27, Austin, Texas, April, 2000.
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| ITJ | Paul Zagacki, Deep Buch, Emile Hsieh, Daniel Melaku, Vladimir Pentkovski, and Hsien-Hsin Lee. "Architecture of a 3D Software Stack for Peak Pentium III Processor Performance." In Intel Technology Journal, Q2, May, 1999.
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| ICPP | Eric Boyd, Waqar Azeem, Hsien-Hsin Lee, Tien-Pao Shih, Shih-Hao Hung, and Edward Davidson. "A Hierarchical Approach to Modeling and Improving the Performance of Scientific Applications on the KSR1." In Proceedings of the 1994 International Conference on Parallel Processing, pp.188-192, St. Charles, Illinois, August, 1994.
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