| FPL-07 | Taeweon Suh, Shih-Lien L. Lu and Hsien-Hsin S. Lee. "An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems." In Proceedings of the 17th International Conference on Field Programmable Logic and Applications, Amsterdam, Netherlands, August, 2007. (Nominated for the Best Paper Award.)
[pdf] [slides] |
| FPGA07 | Taeweon Suh, Hsien-Hsin S. Lee, Shih-Lien Lu, and John Shen. "Coherence Traffic Considered Harmful - An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems." In the 15th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Monterey, CA, February, 2007. |
| SIGDA Ph.D. forum | Taeweon Suh and Hsien-Hsin S. Lee. "Integration of Cache Coherence Protocols for MPSoCs and Coherence Traffic Evaluation using FPGA." In the 9th SIGDA Ph.D. forum in conjunction with the 43rd Design Automation Conference, San Francisco, CA, July, 2006. |
| WARFP | Taeweon Suh, Hsien-Hsin S. Lee, Shih-Lien Lu, and John Shen. "Initial Observations of Hardware/Software Co-Simulation using FPGA in Architecture Research." In Workshop on Architecture Research using FPGA Platforms in conjunction with International Symposium on High-Performance Computer Architecture, Austin, Texas, February, 2006.
[pdf] [slides] |
| CF | Martin Schulz, Brian S. White, Sally A. McKee, Hsien-Hsin S. Lee, and Jurgen Jeitner. "Owl: Next Generation System Monitoring." In Proceedings of the ACM Computing Frontiers 2005, pp.116-124, Ischia, Italy, May, 2005.
[pdf] |
| Perf. Monitor Design | Martin Schulz, Brian White, Sally A. McKee, and Hsien-Hsin Lee. "A Vision for Next Generation System Monitoring." In Workshop on Hardware Performance Monitor Design and Functionality in conjunction with International Symposium on High-Performance Computer Architecture, San Francisco, CA, February, 2005.
[slides] |
| WARFP | Taeweon Suh, Hsien-Hsin S. Lee, Sally A. McKee, and Martin Schulz. "Evaluating System-wide Monitoring Capsule Design Using Xilinx Virtex-II Pro FPGA." In Workshop on Architecture Research using FPGA Platforms in conjunction with International Symposium on High-Performance Computer Architecture, San Francisco, CA, February, 2005.
[pdf] [slides] |
| WARFP | Christopher R. Clark, Ripal Nathuji, and Hsien-Hsin S. Lee. "Using an FPGA as a Prototyping Platform for Multi-core Processor Applications." In Workshop on Architectural Research using FPGA Platforms in conjunction with International Symposium on High-Performance Computer Architecture, San Francisco, CA, February, 2005.
[pdf] |
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