IEEE MICRO | Hsien-Hsin S. Lee. "The Path to Powering Intelligence." In IEEE MICRO Special on The Past, Present, and Future of Warehouse-Scale Computing, Volume 44, Issue 5, Sept/Oct, 2024. [pdf] |
ISPASS-2022 | Yongqin Wang, Edward Suh, Wenjie Xiong, Benjamin Lefaudeux, Brian Knott, Murali Annavaram, Hsien-Hsin S. Lee. "Characterization of MPC-based Private Inferences for Transformer-based Models." In Proceedings of the 2022 ACM/IEEE International Symposium on Performance Analysis of Systems and Software, Singapore, pp.187-197, May, 2022. [pdf] [slides] |
HPCA-28 | Wenjie Xiong, Liu Ke, Dimitrije Jankov, Michael Kounavis, Xiaochen Wang, Eric Northup, Jie Amy Yang, Bilge Acun, Carole-Jean Wu, Ping Tak Peter Tang, G. Edward Suh, Xuan Zhang, and Hsien-Hsin S. Lee.. "SecNDP: Secure Near-Data Processing with Untrusted Memory." In Proceedings of the 28th IEEE International Symposium on High Performance Computer Architecture, Seoul, South Korea, pp.244-258, April, 2022. [pdf] [slides] |
HPCA-28 | Liu Ke, Udit Gupta, Mark Hempstead, Carole-Jean Wu, Hsien-Hsin S. Lee, and Xuan Zhang. "Hercules: Heterogeneity-aware Inference Serving for At-scale Personalized Recommendation." In Proceedings of the 28th IEEE International Symposium on High Performance Computer Architecture, Seoul, South Korea, pp.141-154, April, 2022. [pdf] [slides] |
IEEE MICRO | Liu Ke, Xuan Zhang, Jinin So, Jong-Geon Lee, Shin-Haeng Kang, Sukhan Lee, Songyi Han, YeonGon Cho, JIN Hyun Kim, Yongsuk Kwon, KyungSoo Kim, Jin Jung, Ilkwon Yun, Sung Joo Park, Hyunsun Park, Joonho Song, Jeonghyeon Cho, Kyomin Sohn, Nam Sung Kim, and Hsien-Hsin S. Lee. "Near-Memory Processing in Action: Accelerating Personalized Recommendation with AxDIMM." In IEEE MICRO Special Issue on Processing in Memory, January/February, Vol.42, Issue 1, pp.116-127, 2022. [pdf] |
MICRO-54 | Udit Gupta, Samuel Hsia, Jeff Zhang, Mark Wilkening, Javin Pombra, Hsien-Hsin S. Lee, Gu-Yeon Wei, Carole-Jean Wu, and David Brooks. "RecPipe: Co-Designing Models and Hardware to Jointly Optimize Recommendation Quality and Performance." In Proceedings of the IEEE International Symposium on Microarchitecture, Athens, Greece, pp.870-884, October, 2021. [pdf] |
HPCA-27 | Brandon Reagen, Woo-Seok Choi, Yeongil Ko, Vincent T. Lee, Hsien-Hsin S. Lee, Gu-Yeon Wei, David Brooks. "Cheetah: Optimizing and Accelerating Homomorphic Encryption for Private Inference." In Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, Seoul, South Korea, pp.26-39, February, 2021. [pdf] [slides] |
ISCA-47 | Udit Gupta, Samuel Hsia, Vikram Saraph, Xiaodong Wang, Brandon Reagen, Gu-Yeon Wei, Hsien-Hsin S. Lee, David Brooks, and Carole-Jean Wu. "DeepRecSys: A System for Optimizing End-to-End At-Scale Neural Recommendation Inference." In Proceedings of the 47th ACM/IEEE International Symposium on Computer Architecture, Valencia, Spain, pp.982-995, June, 2020. [pdf] [slides] |
ISCA-47 | Liu Ke, Udit Gupta, Benjamin Y. Cho, David Brooks, Vikas Chandra, Utku Diril, Amin Firoozshahian, Kim Hazelwood, Bill Jia, Hsien-Hsin S. Lee, Meng Li, Bert Maher, Dheevatsa Mudigere, Maxim Naumov, Martin Schatz, Mikhail Smelyanskiy, Xiaodong Wang, Brandon Reagen, Carole-Jean Wu, Mark Hempstead, and Xuan Zhang. "RecNMP: Accelerating Personalized Recommendation with Near-Memory Processing." In Proceedings of the 47th ACM/IEEE International Symposium on Computer Architecture, Valencia, Spain, pp.790-803, June, 2020. [pdf] [slides] |
HPCA-26 | Udit Gupta, Carole-Jean Wu, Xiaodong Wang, Maxim Naumov, Brandon Reagen, David Brooks, Bradford Cottel, Kim Hazelwood, Mark Hempstead, Bill Jia, Hsien-Hsin S. Lee, Andrey Malevich, Dheevatsa Mudigere, Mikhail Smelyanskiy, Liang Xiong, Xuan Zhang. "The Architectural Implications of Facebook's DNN-based Personalized Recommendation." In Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, San Diego, CA, pp.488-501, February, 2020. [pdf] [slides] |
IEEE TC | Dae Hyun Kim, Krit Athikulwongse, Michael B. Healy, Mohammad M. Hossain, Moongon Jung, Ilya Khorosh, Gokul Kumar, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Shreepad Panth, Mohit Pathak, Minzhen Ren, Guanhao Shen, Taigon Song, Dong Hyuk Woo, Xin Zhao, Joungho Kim, Ho Choi, Gabriel H. Loh, Hsien-Hsin S. Lee, and Sung Kyu Lim. "Design and Analysis of 3D-MAPS 3D Massively Parallel Processor with Stacked Memory." In IEEE Transactions on Computers, Vol. 64, No.1, pp.112-125, January, 2015. [pdf] |
SoCC-14 | Sungkap Yeo, Mohammad M. Hossain, Jen-Cheng Huang, and Hsien-Hsin S. Lee. "ATAC: Ambient Temperature-Aware Capping for Power Efficient Datacenters." In Proceedings of the ACM Symposium on Cloud Computing, pp.17:1-17:14, Seattle, WA, November, 2014. [pdf] [slides] |
J. Supercomput | Hong Jun Choi, Dong Oh Son, Seung Gu Kang, Jong Myon Kim, Hsien-Hsin Lee, and Cheol Hong Kim. "An Efficient Scheduling Scheme Using Estimated Execution Time for Heterogeneous Computing Systems." In Jounral of Supercomputing, Vol.65, Issue 2, pp.886-902, 2013.. [pdf] |
CloudCom | Mohammad M. Hossain, Jen-Cheng Huang, and Hsien-Hsin S. Lee. "Migration Energy-Aware Workload Consolidation in Enterprise Clouds." In Proceedings of the IEEE International Conference on Cloud Computing Technology and Science, pp.405-410, December, 2012. [pdf] |
IEEE Computer | Sungkap Yeo and Hsien-Hsin S. Lee. "SimWare: A Holistic Warehouse-scale Computer Simulator." In IEEE Computer, Volume 45, Number 9, pp.48-55, September, 2012. [pdf] |
ICCSA | Hong Jun Choi, Young Jin Park, Hsien-Hsin Lee, and Cheol Hong Kim. "Adaptive Dynamic Frequency Scaling for Thermal-Aware 3D Multi-core Processors." In the Proceedings of the 12th International Conference on Computational Science and Its Applications, pp.602-612, Salvador de Bahia, Brazil, 2012. [pdf] |
ISSCC | Dae Hyun Kim, Krit Athikulwongse, Michael B. Healy, Mohammad M. Hossain, Moongon Jung, Ilya Khorosh, Gokul Kumar, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Shreepad Panth, Mohit Pathak, Minzhen Ren, Guanhao Shen, Taigon Song, Dong Hyuk Woo, Xin Zhao, Joungho Kim, Ho Choi, Gabriel H. Loh, Hsien-Hsin S. Lee, and Sung Kyu Lim. "3D-MAPS: 3D Massively Parallel Processor with Stacked Memory." In Technical Digest of the IEEE International Solid-State Circuits Conference, pp.188-190, San Francisco, CA, 2012. [pdf] [slides] |
3DIC | Xiaodong Wang, Dilip Vasudevan, and Hsien-Hsin S. Lee. "Global Built-In Self-Repair for 3-D Memories with Redundancy Sharing and Parallel Testing." In Proceedings of the IEEE International 3D System Integration Conference, Osaka, Japan, 2012. [pdf] [slides] |
ICPP | Mrinmoy Ghosh, Ripal Nathuji, Min Lee, Karsten Schwan, and Hsien-Hsin S. Lee. "Symbiotic Scheduling for Shared Caches in Multi-Core Systems Using Memory Footprint Signature." In Proceedings of the 40th IEEE International Conference on Parallel Processing, pp.11-20, Taipei, Taiwan, September, 2011. [pdf] [slides] |
IEEE Computer | Sungkap Yeo and Hsien-Hsin S. Lee. "Using Mathematical Modeling in Provisioning a Heterogeneous Cloud Computing Environment." In IEEE Computer, Volume 44, Number 8, pp.55-62, August, 2011. [pdf] |
GPU Computing GEMS | Abderrahim Benquassmi, Eric Fontaine, and Hsien-Hsin S. Lee. "Parallelization of Katsevich CT Image Reconstruction Algorithm on Generic Multi-Core Processors and GPGPU." In GPU Computing GEMS, Section 10 Medical Imaging, Chapter 41, Wen-Mei Hwu (editor in chief), pp.658-577, Morgan Kaufmann Publishers, 2011. [pdf] |
CICC | Michael B. Healy, Krit Athikulwongse, Rohan Goel, Mohammad M. Hossain, Dae Hyun Kim, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Moongon Jung, Brian Ouellette, Mohit Pathak, Hemant Sane, Guanhao Shen, Dong Hyuk Woo, Xin Zhao, Gabriel H. Loh, Hsien-Hsin S. Lee, and Sung Kyu Lim. "Design and Analysis of 3D-MAPS: A Many-Core 3D Processor with Stacked Memory." In Proceedings of the IEEE Custom Integrated Circuits Conference, San Jose, California, September, 2010. (Intel/CICC Student Scholarship Award) [pdf] |
ACM TACO | Dong Hyuk Woo, Joshua B. Fryman, Allan D. Knies, and Hsien-Hsin S. Lee. "Chameleon: Virtualizing Idle Acceleration Cores of A Heterogeneous Multi-Core Processor for Caching and Prefetching." In ACM Transactions on Architecture and Code Optimization, Vol. 7, No. 1, pp.3:1-3:35, April, 2010. [pdf] |
ASPLOS XV | Dong Hyuk Woo and Hsien-Hsin S. Lee. "COMPASS: A Programmable Data Prefetcher Using Idle GPU Shaders." In Proceedings of the 15th International Conference on Architectural Support for Programming Languages and Operating Systems, pp.297-309, Pittsburgh, PA, March, 2010. [pdf] [slides] |
ACM OSR | Dong Hyuk Woo and Hsien-Hsin S. Lee. "PROPHET: Goal-Oriented Provisioning for Highly Tunable Multicore Processors in Cloud Computing." In ACM SIGOPS Operating Systems Review special issue on the Interaction among the OS, Compilers, and Multicore Processors, Vol. 43, No. 2, pp.102-103, April, 2009. [pdf] |
ASP-DAC | Michael Healy, Hsien-Hsin S. Lee, Gabriel H. Loh, and Sung Kyu Lim. "Thermal Optimization in Multi-Granularity Multi-Core Floorplanning." In Proceedings of the 14th IEEE/ACM Asia South Pacific Design Automation Conference, pp.43-48, Yokohama, Japan, 2009. [pdf] |
IEEE Computer | Dong Hyuk Woo and Hsien-Hsin S. Lee. "Extending Amdahl's Law for Energy-Efficient Computing in the Many-Core Era." In IEEE Computer, Vol. 41, No. 12, pp.24-31, December, 2008. [pdf] |
IEEE MICRO | Dong Hyuk Woo, Joshua B. Fryman, Allan D. Knies, Marsha Eng, and Hsien-Hsin S. Lee. "POD: A 3D-Integrated Broad-Purpose Acceleration Layer." In IEEE MICRO special issue on Accelerator Architectures, Vol. 28, No. 4, pp.28-40, July/August, 2008. [pdf] |
MMCS08 | Hrishikesh Amur, Ripal Nathuji, Mrinmoy Ghosh, Karsten Schwan, and Hsien-Hsin S. Lee. "IdlePower: Application-Aware Management of Processor Idle States." In Workshop on Managed Many-Core Systems co-located with ACM/IEEE International Symposium on High Performance Distributed Computing, Boston, MA, June, 2008. [pdf] |
PESPMA08 | Richard M. Yoo and Hsien-Hsin S. Lee. "Helper Transactions: Enabling Thread-Level Speculation via A Transactional Memory System." In Workshop on Parallel Execution of Sequential Programs on Multi-core Architectures in conjuction with ACM/IEEE International Symposium on Computer Architecture (ISCA-35), Beijing, China, June, 2008. [pdf] [slides] |
SPAA | Richard M. Yoo and Hsien-Hsin S. Lee. "Adaptive Transaction Scheduling for Transactional Memory Systems." In Proceedings of the 20th ACM Symposium on Parallelism in Algorithms and Architectures in the Special Track on Hardware and Software Techniques to Improve the Programmability of Multicore Machines, pp.169-178, Munich, Germany, June, 2008. [pdf] [slides] |
SPAA | Richard M. Yoo, Yang Ni, Adam Welc, Bratin Saha, Ali-Reza Adl-Tabatabai, and Hsien-Hsin S. Lee. "Kicking the Tires of Software Transactional Memory: Why the Going Gets Tough." In Proceedings of the 20th ACM Symposium on Parallelism in Algorithms and Architectures in the Special Track on Hardware and Software Techniques to Improve the Programmability of Multicore Machines, pp.265-274, Munich, Germany, June, 2008. [pdf] [slides] |
ASPLOS XIII | Chinnakrishnan S. Ballapuram, Ahmad Sharif, and Hsien-Hsin S. Lee. "Exploiting Access Semantics and Program Behavior to Reduce Snoop Power in Chip Multiprocessors." In Proceedings of the 13th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, pp.60-69, Seattle, WA, March, 2008. [pdf] [slides] |
WACI-VI | Eric Fontaine and Hsien-Hsin S. Lee. "Bicephaly: Maximizing Bandwidth by Duplexing Power and Data." In Workshop on Wild and Crazy Ideas in conjunction with International Conference on Architectural Support for Programming Languages and Operating Systems, Seattle, WA, February, 2008. [pdf] |
ICPADS-07 | Eric Fontaine and Hsien-Hsin S. Lee. "Optimizing Katsevich Image Reconstruction Algorithm on Multicore Processors." In Proceedings of the 13th IEEE International Conference on Parallel and Distributed Systems, Hsinchu, Taiwan, December, 2007. [pdf] [slides] |
ICPADS-07 | Mrinmoy Ghosh and Hsien-Hsin S. Lee. "Virtual Exclusion: An Architectural Approach to Reducing Leakage Energy in Caches for Multiprocessor Systems." In Proceedings of the 13th IEEE International Conference on Parallel and Distributed Systems, Hsinchu, Taiwan, December, 2007. [pdf] [slides] |
HPEC-07 | Dong Hyuk Woo, Joshua B. Fryman, Allan D. Knies, Marsha Eng, and Hsien-Hsin S. Lee. "POD: A Parallel-On-Die Architecture." In the 11th Annual Workshop on High Performance Embedded Computing, Lexington, Massachusetts, September, 2007. (One of four finalists for the Best Paper Award.) [pdf] [slides] |
FPL-07 | Taeweon Suh, Shih-Lien L. Lu and Hsien-Hsin S. Lee. "An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems." In Proceedings of the 17th International Conference on Field Programmable Logic and Applications, Amsterdam, Netherlands, August, 2007. (Nominated for the Best Paper Award.) [pdf] [slides] |
FPGA07 | Taeweon Suh, Hsien-Hsin S. Lee, Shih-Lien Lu, and John Shen. "Coherence Traffic Considered Harmful - An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems." In the 15th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Monterey, CA, February, 2007. |
CMPMSI | Dong Hyuk Woo and Hsien-Hsin S. Lee. "Analyzing Performance Vulnerability due to Resource Denial-of-Service Attack on Chip Multiprocessors." In Workshop on Chip Multiprocessor Memory Systems and Interconnects in conjunction with the 13th International Conference on High-Performance Computer Architecture, Phoenix, Arizona, February, 2007. [pdf] [slides] |
SIGDA Ph.D. forum | Taeweon Suh and Hsien-Hsin S. Lee. "Integration of Cache Coherence Protocols for MPSoCs and Coherence Traffic Evaluation using FPGA." In the 9th SIGDA Ph.D. forum in conjunction with the 43rd Design Automation Conference, San Francisco, CA, July, 2006. |
DAC-42 | Taeweon Suh, Daehyun Kim, and Hsien-Hsin S. Lee. "Cache Coherence Support for Non-Shared Bus Architecture on Heterogeneous MP SoCs." In Proceedings of the 42nd Design Automation Conference (DAC-42), pp.553-558, Anaheim, California, June, 2005. [pdf] [slides] |
WARFP | Christopher R. Clark, Ripal Nathuji, and Hsien-Hsin S. Lee. "Using an FPGA as a Prototyping Platform for Multi-core Processor Applications." In Workshop on Architectural Research using FPGA Platforms in conjunction with International Symposium on High-Performance Computer Architecture, San Francisco, CA, February, 2005. [pdf] |
IEEE MICRO | Taeweon Suh, Hsien-Hsin S. Lee, and Douglas M. Blough. "Integrating Cache Coherence Protocols for Heterogeneous Multiprocessor Systems, Part 2." In IEEE MICRO, pp.70-78, September/October, 2004. [pdf] |
PACT-13 | Weidong Shi, Hsien-Hsin S. Lee, Mrinmoy Ghosh, and Chenghuai Lu. "Architectural Support for High Speed Protection of Memory Integrity and Confidentiality in Multiprocessor Systems." In Proceedings of the International Conference on Parallel Architecture and Compilation Techniques, pp.123-134, Antibes Juan-les-Pins, France, September, 2004. [pdf] [slides] |
IEEE MICRO | Taeweon Suh, Hsien-Hsin S. Lee, and Douglas M. Blough. "Integrating Cache Coherence Protocols for Heterogeneous Multiprocessor Systems, Part 1." In IEEE MICRO special issue on Embedded Systems: Architecture, Design and Tools, pp.33-41, July/August, 2004. [pdf] |
DATE | Taeweon Suh, Douglas M. Blough, and Hsien-Hsin S. Lee. "Supporting Cache Coherence in Heterogeneous Multiprocessor Systems." In Proceedings of the Design, Automation and Test in Europe Conference, pp.1150-1155, Paris, France, February, 2004. [pdf] [slides] |
ICPP | Eric Boyd, Waqar Azeem, Hsien-Hsin Lee, Tien-Pao Shih, Shih-Hao Hung, and Edward Davidson. "A Hierarchical Approach to Modeling and Improving the Performance of Scientific Applications on the KSR1." In Proceedings of the 1994 International Conference on Parallel Processing, pp.188-192, St. Charles, Illinois, August, 1994. [pdf] |
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