Description
Cyber exploits and remote attacks on network servers are becoming enormous concerns by service providers, online merchants, and network users. Due to the deficiency of effective and efficient countermeasures and self-healing capability, malicious adversaries can easily compromise systems, gain unauthorized access, and disrupt services, leading to huge loss of productivity and revenues. To provide high availability, reliability and security for computing systems is, more urgent than ever, the first-order design criteria. On the other hand, technology scaling has reached a point where processor architects can integrate multiple processor cores onto the same die. Using such multi-core processors with necessary hardware and system software support, an introspective computing platform can be constructed to addresses these emerging issues.
An introspective multi-core architecture leverages several advantages offered by the tightly-coupled on-die processor cores to perform: fine-grained security introspection, instant low-overhead checkpoint, and fast, on-demand rollback recovery, thereby providing a continuing service in the face of system compromise or corruption. The key features of an introspective system include programmable asymmetric processor cores, physical insulation against exploits, highly efficient fine-grained introspection, and fast checkpoint/recovery mechanism. In addition, with adequate monitoring and detection mechanism implemented, fault-tolerance and hardware-based transactional memory system can be enabled for minimal cost. Overall, it provides a synergistic and holistic solution toward the challenges of achieving high availability, reliability, and security. The outcome of this research will substantially benefit the IT industry, the generic users for protecting their privacy, and the processor architects to consider these challenges in the early design phase.
More details to come.
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Refereed Journal Articles
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| IEEE Computer | Sungkap Yeo and Hsien-Hsin S. Lee. "SimWare: A Holistic Warehouse-scale Computer Simulator." In IEEE Computer, Volume 45, Number 9, pp.48-55, September, 2012.
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| IEEE Computer | Sungkap Yeo and Hsien-Hsin S. Lee. "Using Mathematical Modeling in Provisioning a Heterogeneous Cloud Computing Environment." In IEEE Computer, Volume 44, Number 8, pp.55-62, August, 2011.
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| IEEE MICRO | Nak Hee Seong, Dong Hyuk Woo, and Hsien-Hsin S. Lee. "Security Refresh: Protect Phase-Change Memory against Malicious Wear-out." In IEEE MICRO special issue on Top Picks from the Computer Architecture Conferences of 2010, pp.119-127, January/February, 2011.
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| JPDC | Jun Yang, Lan Gao, Youtao Zhang, Marek Chrobak, and Hsien-Hsin S. Lee. "A Low-Cost Memory Remapping Scheme for Address Bus Protection." In Journal of Parallel and Distributed Computing, Elsevier, Vol. 70, Issue 5, pp.443-457, 2010.
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| ACM OSR | Dong Hyuk Woo and Hsien-Hsin S. Lee. "PROPHET: Goal-Oriented Provisioning for Highly Tunable Multicore Processors in Cloud Computing." In ACM SIGOPS Operating Systems Review special issue on the Interaction among the OS, Compilers, and Multicore Processors, Vol. 43, No. 2, pp.102-103, April, 2009.
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| JSA | Fayez Mohamood, Mrinmoy Ghosh, and Hsien-Hsin S. Lee. "DLL-Conscious Instruction Fetch Optimization for SMT Processors." In Journal of Systems Architecture, 54, pp.1089-1100, 2008. |
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Refereed Conference Papers
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| MICRO-47 | Jen-Cheng Huang, Joo Hwan Lee, Hyesoon Kim, and Hsien-Hsin S. Lee. "GPUMech: GPU Performance Modeling Technique based on Interval Analysis." In Proceedings of the 47th ACM/IEEE International Symposium on Microarchitecture, pp.268-279, Cambridge, UK, December, 2014.
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| IPDPS | Jen-Cheng Huang, Lifeng Nai, Hyesoon Kim, and Hsien-Hsin S. Lee. "TBPoint: Reducing Simulation Time for Large-Scale GPGPU Kernels." In the 28th International Symposium on Parallel & Distributed Processing Symposium, Phoenix, AZ, 2014.
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| CF-14 | Lifeng Nai, Yinglong Xia, Ching-Yung Lin, Bo Hong, and Hsien-Hsin S. Lee. "Cache-Conscious Graph Collaborative Filtering on Multi-socket Multicore Systems." In Proceedings of the ACM International Conference on Computing Frontiers, Cagliari, Italy, May, 2014.
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| ISCA-40 | Nak Hee Seong, Sungkap Yeo, and Hsien-Hsin S. Lee. "Tri-Level-Cell Phase Change Memory: Toward an Efficient and Reliable Memory System." In Proceedings of the 40th International Symposium on Computer Architecture, pp.440-451, Tel-Aviv, Israel, June, 2013.
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| CloudCom | Mohammad M. Hossain, Jen-Cheng Huang, and Hsien-Hsin S. Lee. "Migration Energy-Aware Workload Consolidation in Enterprise Clouds." In Proceedings of the IEEE International Conference on Cloud Computing Technology and Science, pp.405-410, December, 2012.
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| ANCS | Jen-Cheng Huang, Matteo Monchiero, Yoshio Turner, and Hsien-Hsin S. Lee. "Ally: OS-Transparent Packet Inspection Using Sequestered Cores." In Proceedings of the ACM/IEEE Symposium on Architectures for Networking and Communications Systems, pp.1-11, Brooklyn, NY, October, 2011. (Best Paper Award of ANCS 2011)
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| ICPP | Mrinmoy Ghosh, Ripal Nathuji, Min Lee, Karsten Schwan, and Hsien-Hsin S. Lee. "Symbiotic Scheduling for Shared Caches in Multi-Core Systems Using Memory Footprint Signature." In Proceedings of the 40th IEEE International Conference on Parallel Processing, pp.11-20, Taipei, Taiwan, September, 2011.
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| MICRO-43 | Nak Hee Seong, Dong Hyuk Woo, Vijayalakshmi Srinivasan, Jude A. Rivers, and Hsien-Hsin S. Lee. "SAFER: Stuck-At-Fault Error Recovery for Memories." In Proceedings of the 43th ACM/IEEE International Symposium on Microarchitecture, pp.115-124, Atlanta, Georgia, December, 2010.
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| ISCA-37 | Nak Hee Seong, Dong Hyuk Woo, and Hsien-Hsin S. Lee. "Security Refresh: Prevent Malicious Wear-out and Increase Durability for Phase-Change Memory with Dynamically Randomized Address Mapping." In Proceedings of the 37th International Symposium on Computer Architecture, pp.383-394, Saint-Malo, France, June, 2010. (One of the 11 papers selected as IEEE MICRO's Top Picks from the Computer Architecture Conferences of 2010)
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| MICRO-41 | Vikas R. Vasisht and Hsien-Hsin S. Lee. "SHARK: Architectural Support for Autonomic Protection Against Stealth by Rootkit Exploits." In Proceedings of the 41st ACM/IEEE International Symposium on Microarchitecture, pp.106-116, Lake Como, Italy, November, 2008.
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| CF-07 | Weidong Shi and Hsien-Hsin S. Lee. "Accelerating Memory Decryption and Authentication with Frequent Value Prediction." In Proceedings of the ACM International Conference on Computing Frontiers, pp.35-46, Ischia, Italy, May, 2007.
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Refereed Workshop Papers
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| IPDPSW | Lifeng Nai and Hsien-Hsin S. Lee. "Reducing False Transactional Conflicts With Speculative Sub-blocking State - An Empirical Study for ASF Transactional Memory System." In the 27th International Symposium on Parallel & Distributed Processing Workshops and PhD Forum, Boston, MA, May, 2013.
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| WDDD | Sungkap Yeo, Nak Hee Seong, and Hsien-Hsin S. Lee. "Can Multi-Level Cell PCM Be Reliable and Usable? Analyzing the Impact of Resistance Drift." In the 10th Annual Workshop on Duplicating, Deconstructing and Debunking in conjunction with the 39th International Symposium on Computer Architecture, Portland, OR, June, 2012.
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| MMCS08 | Hrishikesh Amur, Ripal Nathuji, Mrinmoy Ghosh, Karsten Schwan, and Hsien-Hsin S. Lee. "IdlePower: Application-Aware Management of Processor Idle States." In Workshop on Managed Many-Core Systems co-located with ACM/IEEE International Symposium on High Performance Distributed Computing, Boston, MA, June, 2008.
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| PESPMA08 | Richard M. Yoo and Hsien-Hsin S. Lee. "Helper Transactions: Enabling Thread-Level Speculation via A Transactional Memory System." In Workshop on Parallel Execution of Sequential Programs on Multi-core Architectures in conjuction with ACM/IEEE International Symposium on Computer Architecture (ISCA-35), Beijing, China, June, 2008.
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Book Chapters
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| Data Centers | Sungkap Yeo and Hsien-Hsin S. Lee. "Peeling the Power Onion of Data Centers." Chapter 3 in Energy Efficient Thermal Management of Data Centers, pp.137-168, Yogendra Joshi and Pramod Kumar (Editors), Springer, 2012.
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